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Diffstat (limited to 'target/linux/at91/patches-5.10/206-ARM-at91-sfrbu-add-sfrbu-registers-definitions-for-s.patch')
-rw-r--r--target/linux/at91/patches-5.10/206-ARM-at91-sfrbu-add-sfrbu-registers-definitions-for-s.patch53
1 files changed, 0 insertions, 53 deletions
diff --git a/target/linux/at91/patches-5.10/206-ARM-at91-sfrbu-add-sfrbu-registers-definitions-for-s.patch b/target/linux/at91/patches-5.10/206-ARM-at91-sfrbu-add-sfrbu-registers-definitions-for-s.patch
deleted file mode 100644
index 37a22885d7..0000000000
--- a/target/linux/at91/patches-5.10/206-ARM-at91-sfrbu-add-sfrbu-registers-definitions-for-s.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From c6b435625975d9a6daeffd81509a9877ddfb93b5 Mon Sep 17 00:00:00 2001
-From: Claudiu Beznea <claudiu.beznea@microchip.com>
-Date: Thu, 15 Apr 2021 13:49:56 +0300
-Subject: [PATCH 206/247] ARM: at91: sfrbu: add sfrbu registers definitions for
- sama7g5
-
-Add SFRBU registers definitions for SAMA7G5.
-
-Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
-Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
-Link: https://lore.kernel.org/r/20210415105010.569620-11-claudiu.beznea@microchip.com
----
- include/soc/at91/sama7-sfrbu.h | 34 ++++++++++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
- create mode 100644 include/soc/at91/sama7-sfrbu.h
-
---- /dev/null
-+++ b/include/soc/at91/sama7-sfrbu.h
-@@ -0,0 +1,34 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+/*
-+ * Microchip SAMA7 SFRBU registers offsets and bit definitions.
-+ *
-+ * Copyright (C) [2020] Microchip Technology Inc. and its subsidiaries
-+ *
-+ * Author: Claudu Beznea <claudiu.beznea@microchip.com>
-+ */
-+
-+#ifndef __SAMA7_SFRBU_H__
-+#define __SAMA7_SFRBU_H__
-+
-+#ifdef CONFIG_SOC_SAMA7
-+
-+#define AT91_SFRBU_PSWBU (0x00) /* SFRBU Power Switch BU Control Register */
-+#define AT91_SFRBU_PSWBU_PSWKEY (0x4BD20C << 8) /* Specific value mandatory to allow writing of other register bits */
-+#define AT91_SFRBU_PSWBU_STATE (1 << 2) /* Power switch BU state */
-+#define AT91_SFRBU_PSWBU_SOFTSWITCH (1 << 1) /* Power switch BU source selection */
-+#define AT91_SFRBU_PSWBU_CTRL (1 << 0) /* Power switch BU control */
-+
-+#define AT91_SFRBU_25LDOCR (0x0C) /* SFRBU 2.5V LDO Control Register */
-+#define AT91_SFRBU_25LDOCR_LDOANAKEY (0x3B6E18 << 8) /* Specific value mandatory to allow writing of other register bits. */
-+#define AT91_SFRBU_25LDOCR_STATE (1 << 3) /* LDOANA Switch On/Off Control */
-+#define AT91_SFRBU_25LDOCR_LP (1 << 2) /* LDOANA Low-Power Mode Control */
-+#define AT91_SFRBU_PD_VALUE_MSK (0x3)
-+#define AT91_SFRBU_25LDOCR_PD_VALUE(v) ((v) & AT91_SFRBU_PD_VALUE_MSK) /* LDOANA Pull-down value */
-+
-+#define AT91_FRBU_DDRPWR (0x10) /* SFRBU DDR Power Control Register */
-+#define AT91_FRBU_DDRPWR_STATE (1 << 0) /* DDR Power Mode State */
-+
-+#endif /* CONFIG_SOC_SAMA7 */
-+
-+#endif /* __SAMA7_SFRBU_H__ */
-+