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Diffstat (limited to 'target/linux/at91/patches-5.10/170-media-atmel-atmel-isc-add-DMA-to-register-offsets.patch')
-rw-r--r--target/linux/at91/patches-5.10/170-media-atmel-atmel-isc-add-DMA-to-register-offsets.patch19
1 files changed, 4 insertions, 15 deletions
diff --git a/target/linux/at91/patches-5.10/170-media-atmel-atmel-isc-add-DMA-to-register-offsets.patch b/target/linux/at91/patches-5.10/170-media-atmel-atmel-isc-add-DMA-to-register-offsets.patch
index 92f6f3ead6..ef7104e587 100644
--- a/target/linux/at91/patches-5.10/170-media-atmel-atmel-isc-add-DMA-to-register-offsets.patch
+++ b/target/linux/at91/patches-5.10/170-media-atmel-atmel-isc-add-DMA-to-register-offsets.patch
@@ -21,11 +21,9 @@ Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
.../media/platform/atmel/atmel-sama5d2-isc.c | 1 +
4 files changed, 18 insertions(+), 7 deletions(-)
-diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c
-index 5c95aa45cf6c..e010429fc44d 100644
--- a/drivers/media/platform/atmel/atmel-isc-base.c
+++ b/drivers/media/platform/atmel/atmel-isc-base.c
-@@ -601,16 +601,20 @@ static void isc_start_dma(struct isc_device *isc)
+@@ -601,16 +601,20 @@ static void isc_start_dma(struct isc_dev
ISC_PFE_CFG0_COLEN | ISC_PFE_CFG0_ROWEN);
addr0 = vb2_dma_contig_plane_dma_addr(&isc->cur_frm->vb.vb2_buf, 0);
@@ -51,7 +49,7 @@ index 5c95aa45cf6c..e010429fc44d 100644
break;
default:
break;
-@@ -618,7 +622,8 @@ static void isc_start_dma(struct isc_device *isc)
+@@ -618,7 +622,8 @@ static void isc_start_dma(struct isc_dev
dctrl_dview = isc->config.dctrl_dview;
@@ -61,7 +59,7 @@ index 5c95aa45cf6c..e010429fc44d 100644
spin_lock(&isc->awb_lock);
regmap_write(regmap, ISC_CTRLEN, ISC_CTRL_CAPTURE);
spin_unlock(&isc->awb_lock);
-@@ -731,7 +736,7 @@ static int isc_configure(struct isc_device *isc)
+@@ -731,7 +736,7 @@ static int isc_configure(struct isc_devi
regmap_update_bits(regmap, ISC_RLP_CFG + isc->offsets.rlp,
ISC_RLP_CFG_MODE_MASK, rlp_mode);
@@ -70,8 +68,6 @@ index 5c95aa45cf6c..e010429fc44d 100644
/* Set the pipeline */
isc_set_pipeline(isc, pipeline);
-diff --git a/drivers/media/platform/atmel/atmel-isc-regs.h b/drivers/media/platform/atmel/atmel-isc-regs.h
-index 0ab280ab59ec..4940998c82a2 100644
--- a/drivers/media/platform/atmel/atmel-isc-regs.h
+++ b/drivers/media/platform/atmel/atmel-isc-regs.h
@@ -247,6 +247,9 @@
@@ -84,8 +80,6 @@ index 0ab280ab59ec..4940998c82a2 100644
/* DMA Configuration Register */
#define ISC_DCFG 0x000003e0
#define ISC_DCFG_IMODE_PACKED8 0x0
-diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h
-index 97ec4c58297e..bea545327d3d 100644
--- a/drivers/media/platform/atmel/atmel-isc.h
+++ b/drivers/media/platform/atmel/atmel-isc.h
@@ -151,6 +151,7 @@ struct isc_ctrls {
@@ -104,11 +98,9 @@ index 97ec4c58297e..bea545327d3d 100644
};
/*
-diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
-index db93cb76c08b..bfd56ac5c921 100644
--- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c
+++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
-@@ -257,6 +257,7 @@ static int atmel_isc_probe(struct platform_device *pdev)
+@@ -257,6 +257,7 @@ static int atmel_isc_probe(struct platfo
isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET;
isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET;
@@ -116,6 +108,3 @@ index db93cb76c08b..bfd56ac5c921 100644
/* sama5d2-isc - 8 bits per beat */
isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
---
-2.32.0
-
ristev <eugen.hristev@microchip.com> Date: Fri, 13 Nov 2020 15:24:29 +0200 Subject: [PATCH 131/247] pinctrl: at91-pio4: add support for fewer lines on last PIO bank Some products, like sama7g5, do not have a full last bank of PIO lines. In this case for example, sama7g5 only has 8 lines for the PE bank. PA0-31, PB0-31, PC0-31, PD0-31, PE0-7, in total 136 lines. To cope with this situation, added a data attribute that is product dependent, to specify the number of lines of the last bank. In case this number is different from the macro ATMEL_PIO_NPINS_PER_BANK, adjust the total number of lines accordingly. This will avoid advertising 160 lines instead of the actual 136, as this product supports, and to avoid reading/writing to invalid register addresses. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20201113132429.420940-1-eugen.hristev@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- drivers/pinctrl/pinctrl-at91-pio4.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index 578b387100d9..d267367d94b9 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -71,8 +71,15 @@ /* Custom pinconf parameters */ #define ATMEL_PIN_CONFIG_DRIVE_STRENGTH (PIN_CONFIG_END + 1) +/** + * struct atmel_pioctrl_data - Atmel PIO controller (pinmux + gpio) data struct + * @nbanks: number of PIO banks + * @last_bank_count: number of lines in the last bank (can be less than + * the rest of the banks). + */ struct atmel_pioctrl_data { unsigned nbanks; + unsigned last_bank_count; }; struct atmel_group { @@ -980,11 +987,13 @@ static const struct dev_pm_ops atmel_pctrl_pm_ops = { * We can have up to 16 banks. */ static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = { - .nbanks = 4, + .nbanks = 4, + .last_bank_count = ATMEL_PIO_NPINS_PER_BANK, }; static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = { - .nbanks = 5, + .nbanks = 5, + .last_bank_count = 8, /* sama7g5 has only PE0 to PE7 */ }; static const struct of_device_id atmel_pctrl_of_match[] = { @@ -1025,6 +1034,11 @@ static int atmel_pinctrl_probe(struct platform_device *pdev) atmel_pioctrl_data = match->data; atmel_pioctrl->nbanks = atmel_pioctrl_data->nbanks; atmel_pioctrl->npins = atmel_pioctrl->nbanks * ATMEL_PIO_NPINS_PER_BANK; + /* if last bank has limited number of pins, adjust accordingly */ + if (atmel_pioctrl_data->last_bank_count != ATMEL_PIO_NPINS_PER_BANK) { + atmel_pioctrl->npins -= ATMEL_PIO_NPINS_PER_BANK; + atmel_pioctrl->npins += atmel_pioctrl_data->last_bank_count; + } atmel_pioctrl->reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(atmel_pioctrl->reg_base)) -- 2.32.0