diff options
Diffstat (limited to 'target/linux/at91/patches-5.10/107-clk-at91-sama7g5-remove-mck0-from-parent-list-of-oth.patch')
| -rw-r--r-- | target/linux/at91/patches-5.10/107-clk-at91-sama7g5-remove-mck0-from-parent-list-of-oth.patch | 201 |
1 files changed, 201 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.10/107-clk-at91-sama7g5-remove-mck0-from-parent-list-of-oth.patch b/target/linux/at91/patches-5.10/107-clk-at91-sama7g5-remove-mck0-from-parent-list-of-oth.patch new file mode 100644 index 0000000000..20d6776a92 --- /dev/null +++ b/target/linux/at91/patches-5.10/107-clk-at91-sama7g5-remove-mck0-from-parent-list-of-oth.patch @@ -0,0 +1,201 @@ +From 7cfe2dfe5ac7c72b904e4b59b240caa42721ee07 Mon Sep 17 00:00:00 2001 +From: Claudiu Beznea <claudiu.beznea@microchip.com> +Date: Thu, 19 Nov 2020 17:43:13 +0200 +Subject: [PATCH 107/247] clk: at91: sama7g5: remove mck0 from parent list of + other clocks + +MCK0 is changed at runtime by DVFS. Due to this, since not all IPs +are glitch free aware at MCK0 changes, remove MCK0 from parent list +of other clocks (e.g. generic clock, programmable/system clock, MCKX). + +Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> +Link: https://lore.kernel.org/r/1605800597-16720-8-git-send-email-claudiu.beznea@microchip.com +Signed-off-by: Stephen Boyd <sboyd@kernel.org> +--- + drivers/clk/at91/sama7g5.c | 55 ++++++++++++++++++-------------------- + 1 file changed, 26 insertions(+), 29 deletions(-) + +diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c +index d7c2b731ad20..335e9c943c65 100644 +--- a/drivers/clk/at91/sama7g5.c ++++ b/drivers/clk/at91/sama7g5.c +@@ -280,7 +280,7 @@ static const struct { + .ep = { "syspll_divpmcck", "ddrpll_divpmcck", "imgpll_divpmcck", }, + .ep_mux_table = { 5, 6, 7, }, + .ep_count = 3, +- .ep_chg_id = 6, }, ++ .ep_chg_id = 5, }, + + { .n = "mck4", + .id = 4, +@@ -313,7 +313,7 @@ static const struct { + }; + + /* Mux table for programmable clocks. */ +-static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 3, 5, 6, 7, 8, 9, 10, }; ++static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, }; + + /** + * Peripheral clock description +@@ -436,7 +436,7 @@ static const struct { + .pp = { "audiopll_divpmcck", }, + .pp_mux_table = { 9, }, + .pp_count = 1, +- .pp_chg_id = 4, }, ++ .pp_chg_id = 3, }, + + { .n = "csi_gclk", + .id = 33, +@@ -548,7 +548,7 @@ static const struct { + .pp = { "ethpll_divpmcck", }, + .pp_mux_table = { 10, }, + .pp_count = 1, +- .pp_chg_id = 4, }, ++ .pp_chg_id = 3, }, + + { .n = "gmac1_gclk", + .id = 52, +@@ -580,7 +580,7 @@ static const struct { + .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp_mux_table = { 5, 9, }, + .pp_count = 2, +- .pp_chg_id = 5, }, ++ .pp_chg_id = 4, }, + + { .n = "i2smcc1_gclk", + .id = 58, +@@ -588,7 +588,7 @@ static const struct { + .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp_mux_table = { 5, 9, }, + .pp_count = 2, +- .pp_chg_id = 5, }, ++ .pp_chg_id = 4, }, + + { .n = "mcan0_gclk", + .id = 61, +@@ -730,7 +730,7 @@ static const struct { + .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp_mux_table = { 5, 8, }, + .pp_count = 2, +- .pp_chg_id = 5, }, ++ .pp_chg_id = 4, }, + + { .n = "sdmmc1_gclk", + .id = 81, +@@ -738,7 +738,7 @@ static const struct { + .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp_mux_table = { 5, 8, }, + .pp_count = 2, +- .pp_chg_id = 5, }, ++ .pp_chg_id = 4, }, + + { .n = "sdmmc2_gclk", + .id = 82, +@@ -746,7 +746,7 @@ static const struct { + .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp_mux_table = { 5, 8, }, + .pp_count = 2, +- .pp_chg_id = 5, }, ++ .pp_chg_id = 4, }, + + { .n = "spdifrx_gclk", + .id = 84, +@@ -754,7 +754,7 @@ static const struct { + .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp_mux_table = { 5, 9, }, + .pp_count = 2, +- .pp_chg_id = 5, }, ++ .pp_chg_id = 4, }, + + { .n = "spdiftx_gclk", + .id = 85, +@@ -762,7 +762,7 @@ static const struct { + .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp_mux_table = { 5, 9, }, + .pp_count = 2, +- .pp_chg_id = 5, }, ++ .pp_chg_id = 4, }, + + { .n = "tcb0_ch0_gclk", + .id = 88, +@@ -961,9 +961,8 @@ static void __init sama7g5_pmc_setup(struct device_node *np) + parent_names[0] = md_slck_name; + parent_names[1] = td_slck_name; + parent_names[2] = "mainck"; +- parent_names[3] = "mck0"; + for (i = 0; i < ARRAY_SIZE(sama7g5_mckx); i++) { +- u8 num_parents = 4 + sama7g5_mckx[i].ep_count; ++ u8 num_parents = 3 + sama7g5_mckx[i].ep_count; + u32 *mux_table; + + mux_table = kmalloc_array(num_parents, sizeof(*mux_table), +@@ -971,10 +970,10 @@ static void __init sama7g5_pmc_setup(struct device_node *np) + if (!mux_table) + goto err_free; + +- SAMA7G5_INIT_TABLE(mux_table, 4); +- SAMA7G5_FILL_TABLE(&mux_table[4], sama7g5_mckx[i].ep_mux_table, ++ SAMA7G5_INIT_TABLE(mux_table, 3); ++ SAMA7G5_FILL_TABLE(&mux_table[3], sama7g5_mckx[i].ep_mux_table, + sama7g5_mckx[i].ep_count); +- SAMA7G5_FILL_TABLE(&parent_names[4], sama7g5_mckx[i].ep, ++ SAMA7G5_FILL_TABLE(&parent_names[3], sama7g5_mckx[i].ep, + sama7g5_mckx[i].ep_count); + + hw = at91_clk_sama7g5_register_master(regmap, sama7g5_mckx[i].n, +@@ -997,20 +996,19 @@ static void __init sama7g5_pmc_setup(struct device_node *np) + parent_names[0] = md_slck_name; + parent_names[1] = td_slck_name; + parent_names[2] = "mainck"; +- parent_names[3] = "mck0"; +- parent_names[4] = "syspll_divpmcck"; +- parent_names[5] = "ddrpll_divpmcck"; +- parent_names[6] = "imgpll_divpmcck"; +- parent_names[7] = "baudpll_divpmcck"; +- parent_names[8] = "audiopll_divpmcck"; +- parent_names[9] = "ethpll_divpmcck"; ++ parent_names[3] = "syspll_divpmcck"; ++ parent_names[4] = "ddrpll_divpmcck"; ++ parent_names[5] = "imgpll_divpmcck"; ++ parent_names[6] = "baudpll_divpmcck"; ++ parent_names[7] = "audiopll_divpmcck"; ++ parent_names[8] = "ethpll_divpmcck"; + for (i = 0; i < 8; i++) { + char name[6]; + + snprintf(name, sizeof(name), "prog%d", i); + + hw = at91_clk_register_programmable(regmap, name, parent_names, +- 10, i, ++ 9, i, + &programmable_layout, + sama7g5_prog_mux_table); + if (IS_ERR(hw)) +@@ -1047,9 +1045,8 @@ static void __init sama7g5_pmc_setup(struct device_node *np) + parent_names[0] = md_slck_name; + parent_names[1] = td_slck_name; + parent_names[2] = "mainck"; +- parent_names[3] = "mck0"; + for (i = 0; i < ARRAY_SIZE(sama7g5_gck); i++) { +- u8 num_parents = 4 + sama7g5_gck[i].pp_count; ++ u8 num_parents = 3 + sama7g5_gck[i].pp_count; + u32 *mux_table; + + mux_table = kmalloc_array(num_parents, sizeof(*mux_table), +@@ -1057,10 +1054,10 @@ static void __init sama7g5_pmc_setup(struct device_node *np) + if (!mux_table) + goto err_free; + +- SAMA7G5_INIT_TABLE(mux_table, 4); +- SAMA7G5_FILL_TABLE(&mux_table[4], sama7g5_gck[i].pp_mux_table, ++ SAMA7G5_INIT_TABLE(mux_table, 3); ++ SAMA7G5_FILL_TABLE(&mux_table[3], sama7g5_gck[i].pp_mux_table, + sama7g5_gck[i].pp_count); +- SAMA7G5_FILL_TABLE(&parent_names[4], sama7g5_gck[i].pp, ++ SAMA7G5_FILL_TABLE(&parent_names[3], sama7g5_gck[i].pp, + sama7g5_gck[i].pp_count); + + hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, +-- +2.32.0 + |