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-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c25
1 files changed, 23 insertions, 2 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 02c374a984..7975464333 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -605,7 +605,6 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344:
- case ATH79_SOC_QCA9558:
switch (pdata->phy_if_mode) {
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_GMII:
@@ -617,6 +616,17 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
}
break;
+ case ATH79_SOC_QCA9558:
+ switch (pdata->phy_if_mode) {
+ case PHY_INTERFACE_MODE_MII:
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_SGMII:
+ break;
+ default:
+ return -EINVAL;
+ }
+ break;
+
default:
BUG();
}
@@ -654,7 +664,6 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344:
- case ATH79_SOC_QCA9558:
switch (pdata->phy_if_mode) {
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_GMII:
@@ -664,6 +673,17 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
}
break;
+ case ATH79_SOC_QCA9558:
+ switch (pdata->phy_if_mode) {
+ case PHY_INTERFACE_MODE_MII:
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_SGMII:
+ break;
+ default:
+ return -EINVAL;
+ }
+ break;
+
default:
BUG();
}
@@ -921,6 +941,7 @@ void __init ath79_register_eth(unsigned int id)
switch (pdata->phy_if_mode) {
case PHY_INTERFACE_MODE_GMII:
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_SGMII:
if (!pdata->has_gbit) {
printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
id);