diff options
Diffstat (limited to 'target/linux/ar71xx/patches-4.9')
3 files changed, 74 insertions, 4 deletions
diff --git a/target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch b/target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch new file mode 100644 index 0000000000..c0b5459e45 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch @@ -0,0 +1,70 @@ +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -195,7 +195,6 @@ config ATH79 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_ZBOOT_UART_PROM +- select USE_OF + help + Support for the Atheros AR71XX/AR724X/AR913X SoCs. + +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -196,16 +196,20 @@ unsigned int get_c0_compare_int(void) + + void __init plat_mem_setup(void) + { ++#ifdef CONFIG_OF + unsigned long fdt_start; ++#endif + + set_io_port_base(KSEG1); + ++#ifdef CONFIG_OF + /* Get the position of the FDT passed by the bootloader */ + fdt_start = fw_getenvl("fdt_start"); + if (fdt_start) + __dt_setup_arch((void *)KSEG0ADDR(fdt_start)); + else if (fw_passed_dtb) + __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb)); ++#endif + + if (mips_machtype != ATH79_MACH_GENERIC_OF) { + ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, +@@ -301,17 +305,21 @@ static int __init ath79_setup(void) + + arch_initcall(ath79_setup); + ++#ifdef CONFIG_OF + void __init device_tree_init(void) + { + unflatten_and_copy_device_tree(); + } ++#endif + + MIPS_MACHINE(ATH79_MACH_GENERIC, + "Generic", + "Generic AR71XX/AR724X/AR913X based board", + NULL); + ++#ifdef CONFIG_OF + MIPS_MACHINE(ATH79_MACH_GENERIC_OF, + "DTB", + "Generic AR71XX/AR724X/AR913X based board (DT)", + NULL); ++#endif +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -33,10 +33,12 @@ + #define AR724X_BASE_FREQ 40000000 + + static struct clk *clks[ATH79_CLK_END]; ++#ifdef CONFIG_OF + static struct clk_onecell_data clk_data = { + .clks = clks, + .clk_num = ARRAY_SIZE(clks), + }; ++#endif + + static struct clk *__init ath79_add_sys_clkdev( + const char *id, unsigned long rate) diff --git a/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch index 869fdd6dd0..03ff6c6aac 100644 --- a/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch +++ b/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch @@ -44,7 +44,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. config ATH79_NVRAM --- a/arch/mips/ath79/clock.c +++ b/arch/mips/ath79/clock.c -@@ -356,6 +356,91 @@ static void __init ar934x_clocks_init(vo +@@ -358,6 +358,91 @@ static void __init ar934x_clocks_init(vo iounmap(dpll_base); } @@ -136,7 +136,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. static void __init qca955x_clocks_init(void) { unsigned long ref_rate; -@@ -451,6 +536,8 @@ void __init ath79_clocks_init(void) +@@ -453,6 +538,8 @@ void __init ath79_clocks_init(void) ar933x_clocks_init(); else if (soc_is_ar934x()) ar934x_clocks_init(); diff --git a/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch index dafac99190..e6eaa7123a 100644 --- a/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch +++ b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch @@ -24,7 +24,7 @@ config ATH79_NVRAM --- a/arch/mips/ath79/clock.c +++ b/arch/mips/ath79/clock.c -@@ -526,6 +526,100 @@ static void __init qca955x_clocks_init(v +@@ -528,6 +528,100 @@ static void __init qca955x_clocks_init(v clk_add_alias("uart", NULL, "ref", NULL); } @@ -125,7 +125,7 @@ void __init ath79_clocks_init(void) { if (soc_is_ar71xx()) -@@ -540,6 +634,8 @@ void __init ath79_clocks_init(void) +@@ -542,6 +636,8 @@ void __init ath79_clocks_init(void) qca953x_clocks_init(); else if (soc_is_qca955x()) qca955x_clocks_init(); |