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-rw-r--r--target/linux/ar71xx/patches-3.2/119-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch33
1 files changed, 33 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.2/119-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch b/target/linux/ar71xx/patches-3.2/119-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch
new file mode 100644
index 0000000000..36d17e9fa1
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.2/119-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch
@@ -0,0 +1,33 @@
+From 1759a5bc87d0eb8dbb0d8a9794b336813057eb88 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Thu, 25 Nov 2010 17:59:28 +0100
+Subject: [PATCH 19/35] MIPS: ath79: register PCI controller on the PB44 board
+
+The PB44 reference board has two miniPCI slots. Register
+the PCI controller to make those usable.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+
+v2: - no changes
+---
+ arch/mips/ath79/mach-pb44.c | 2 ++
+ 1 files changed, 2 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/ath79/mach-pb44.c
++++ b/arch/mips/ath79/mach-pb44.c
+@@ -19,6 +19,7 @@
+ #include "dev-leds-gpio.h"
+ #include "dev-spi.h"
+ #include "dev-usb.h"
++#include "pci.h"
+
+ #define PB44_GPIO_I2C_SCL 0
+ #define PB44_GPIO_I2C_SDA 1
+@@ -114,6 +115,7 @@ static void __init pb44_init(void)
+ ath79_register_spi(&pb44_spi_data, pb44_spi_info,
+ ARRAY_SIZE(pb44_spi_info));
+ ath79_register_usb();
++ ath79_register_pci();
+ }
+
+ MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",