diff options
Diffstat (limited to 'target/linux/apm821xx')
5 files changed, 85 insertions, 152 deletions
diff --git a/target/linux/apm821xx/patches-4.19/010-dmaengine-dw-dmac-implement-dma-prot.patch b/target/linux/apm821xx/patches-4.19/010-dmaengine-dw-dmac-implement-dma-prot.patch deleted file mode 100644 index 86da6fcd89..0000000000 --- a/target/linux/apm821xx/patches-4.19/010-dmaengine-dw-dmac-implement-dma-prot.patch +++ /dev/null @@ -1,141 +0,0 @@ -From 7b0c03ecc42fb223baf015877fee9d517c2c8af1 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter <chunkeey@gmail.com> -Date: Sat, 17 Nov 2018 17:17:21 +0100 -Subject: dmaengine: dw-dmac: implement dma protection control setting - -This patch adds a new device-tree property that allows to -specify the dma protection control bits for the all of the -DMA controller's channel uniformly. - -Setting the "correct" bits can have a huge impact on the -PPC460EX and APM82181 that use this DMA engine in combination -with a DesignWare' SATA-II core (sata_dwc_460ex driver). - -In the OpenWrt Forum, the user takimata reported that: -|It seems your patch unleashed the full power of the SATA port. -|Where I was previously hitting a really hard limit at around -|82 MB/s for reading and 27 MB/s for writing, I am now getting this: -| -|root@OpenWrt:/mnt# time dd if=/dev/zero of=tempfile bs=1M count=1024 -|1024+0 records in -|1024+0 records out -|real 0m 13.65s -|user 0m 0.01s -|sys 0m 11.89s -| -|root@OpenWrt:/mnt# time dd if=tempfile of=/dev/null bs=1M count=1024 -|1024+0 records in -|1024+0 records out -|real 0m 8.41s -|user 0m 0.01s -|sys 0m 4.70s -| -|This means: 121 MB/s reading and 75 MB/s writing! -| -|The drive is a WD Green WD10EARX taken from an older MBL Single. -|I repeated the test a few times with even larger files to rule out -|any caching, I'm still seeing the same great performance. OpenWrt is -|now completely on par with the original MBL firmware's performance. - -Another user And.short reported: -|I can report that your fix worked! Boots up fine with two -|drives even with more partitions, and no more reboot on -|concurrent disk access! - -A closer look into the sata_dwc_460ex code revealed that -the driver did initally set the correct protection control -bits. However, this feature was lost when the sata_dwc_460ex -driver was converted to the generic DMA driver framework. - -BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/55 -BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/50 -Fixes: 8b3444852a2b ("sata_dwc_460ex: move to generic DMA driver") -Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> -Signed-off-by: Christian Lamparter <chunkeey@gmail.com> -Signed-off-by: Vinod Koul <vkoul@kernel.org> ---- - ---- a/drivers/dma/dw/core.c -+++ b/drivers/dma/dw/core.c -@@ -160,12 +160,14 @@ static void dwc_initialize_chan_idma32(s - - static void dwc_initialize_chan_dw(struct dw_dma_chan *dwc) - { -+ struct dw_dma *dw = to_dw_dma(dwc->chan.device); - u32 cfghi = DWC_CFGH_FIFO_MODE; - u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority); - bool hs_polarity = dwc->dws.hs_polarity; - - cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id); - cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id); -+ cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl); - - /* Set polarity of handshake interface */ - cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0; ---- a/drivers/dma/dw/platform.c -+++ b/drivers/dma/dw/platform.c -@@ -162,6 +162,12 @@ dw_dma_parse_dt(struct platform_device * - pdata->multi_block[tmp] = 1; - } - -+ if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) { -+ if (tmp > CHAN_PROTCTL_MASK) -+ return NULL; -+ pdata->protctl = tmp; -+ } -+ - return pdata; - } - #else ---- a/drivers/dma/dw/regs.h -+++ b/drivers/dma/dw/regs.h -@@ -200,6 +200,10 @@ enum dw_dma_msize { - #define DWC_CFGH_FCMODE (1 << 0) - #define DWC_CFGH_FIFO_MODE (1 << 1) - #define DWC_CFGH_PROTCTL(x) ((x) << 2) -+#define DWC_CFGH_PROTCTL_DATA (0 << 2) /* data access - always set */ -+#define DWC_CFGH_PROTCTL_PRIV (1 << 2) /* privileged -> AHB HPROT[1] */ -+#define DWC_CFGH_PROTCTL_BUFFER (2 << 2) /* bufferable -> AHB HPROT[2] */ -+#define DWC_CFGH_PROTCTL_CACHE (4 << 2) /* cacheable -> AHB HPROT[3] */ - #define DWC_CFGH_DS_UPD_EN (1 << 5) - #define DWC_CFGH_SS_UPD_EN (1 << 6) - #define DWC_CFGH_SRC_PER(x) ((x) << 7) ---- a/include/linux/platform_data/dma-dw.h -+++ b/include/linux/platform_data/dma-dw.h -@@ -49,6 +49,7 @@ struct dw_dma_slave { - * @data_width: Maximum data width supported by hardware per AHB master - * (in bytes, power of 2) - * @multi_block: Multi block transfers supported by hardware per channel. -+ * @protctl: Protection control signals setting per channel. - */ - struct dw_dma_platform_data { - unsigned int nr_channels; -@@ -65,6 +66,11 @@ struct dw_dma_platform_data { - unsigned char nr_masters; - unsigned char data_width[DW_DMA_MAX_NR_MASTERS]; - unsigned char multi_block[DW_DMA_MAX_NR_CHANNELS]; -+#define CHAN_PROTCTL_PRIVILEGED BIT(0) -+#define CHAN_PROTCTL_BUFFERABLE BIT(1) -+#define CHAN_PROTCTL_CACHEABLE BIT(2) -+#define CHAN_PROTCTL_MASK GENMASK(2, 0) -+ unsigned char protctl; - }; - - #endif /* _PLATFORM_DATA_DMA_DW_H */ ---- /dev/null -+++ b/include/dt-bindings/dma/dw-dmac.h -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ -+ -+#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__ -+#define __DT_BINDINGS_DMA_DW_DMAC_H__ -+ -+/* -+ * Protection Control bits provide protection against illegal transactions. -+ * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals. -+ */ -+#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */ -+#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */ -+#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */ -+ -+#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */ diff --git a/target/linux/apm821xx/patches-4.19/010-dt-bindings-dmaengine-dw-dmac-add-protection-control.patch b/target/linux/apm821xx/patches-4.19/010-dt-bindings-dmaengine-dw-dmac-add-protection-control.patch new file mode 100644 index 0000000000..572b8b6522 --- /dev/null +++ b/target/linux/apm821xx/patches-4.19/010-dt-bindings-dmaengine-dw-dmac-add-protection-control.patch @@ -0,0 +1,74 @@ +From 538098281ce884a51d2aa4ab445056a41741c6ad Mon Sep 17 00:00:00 2001 +From: Christian Lamparter <chunkeey@gmail.com> +Date: Sat, 17 Nov 2018 17:17:20 +0100 +Subject: [PATCH] dt-bindings: dmaengine: dw-dmac: add protection control + property + +This patch for the DesignWare AHB Central +Direct Memory Access Controller adds the dma +protection control property: + "snps,dma-protection-control" + +as well as the properties specific values defines into +a new include file: include/dt-bindings/dma/dw-dmac.h + +Note: The protection control signals are one-to-one +mapped to the AHB HPROT[1:3] signals for this controller. +The HPROT0 (Data Access) is always hardwired to 1. + +Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Reviewed-by: Rob Herring <robh@kernel.org> +Signed-off-by: Christian Lamparter <chunkeey@gmail.com> +Signed-off-by: Vinod Koul <vkoul@kernel.org> +--- + Documentation/devicetree/bindings/dma/snps-dma.txt | 4 ++++ + MAINTAINERS | 4 +++- + include/dt-bindings/dma/dw-dmac.h | 14 ++++++++++++++ + 3 files changed, 21 insertions(+), 1 deletion(-) + create mode 100644 include/dt-bindings/dma/dw-dmac.h + +--- a/Documentation/devicetree/bindings/dma/snps-dma.txt ++++ b/Documentation/devicetree/bindings/dma/snps-dma.txt +@@ -27,6 +27,10 @@ Optional properties: + general purpose DMA channel allocator. False if not passed. + - multi-block: Multi block transfers supported by hardware. Array property with + one cell per channel. 0: not supported, 1 (default): supported. ++- snps,dma-protection-control: AHB HPROT[3:1] protection setting. ++ The default value is 0 (for non-cacheable, non-buffered, ++ unprivileged data access). ++ Refer to include/dt-bindings/dma/dw-dmac.h for possible values. + + Example: + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -14075,9 +14075,11 @@ SYNOPSYS DESIGNWARE DMAC DRIVER + M: Viresh Kumar <vireshk@kernel.org> + R: Andy Shevchenko <andriy.shevchenko@linux.intel.com> + S: Maintained ++F: Documentation/devicetree/bindings/dma/snps-dma.txt ++F: drivers/dma/dw/ ++F: include/dt-bindings/dma/dw-dmac.h + F: include/linux/dma/dw.h + F: include/linux/platform_data/dma-dw.h +-F: drivers/dma/dw/ + + SYNOPSYS DESIGNWARE ENTERPRISE ETHERNET DRIVER + M: Jose Abreu <Jose.Abreu@synopsys.com> +--- /dev/null ++++ b/include/dt-bindings/dma/dw-dmac.h +@@ -0,0 +1,14 @@ ++/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ ++ ++#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__ ++#define __DT_BINDINGS_DMA_DW_DMAC_H__ ++ ++/* ++ * Protection Control bits provide protection against illegal transactions. ++ * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals. ++ */ ++#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */ ++#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */ ++#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */ ++ ++#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */ diff --git a/target/linux/apm821xx/patches-4.19/023-0004-crypto4xx_core-don-t-abuse-__dma_sync_page.patch b/target/linux/apm821xx/patches-4.19/023-0004-crypto4xx_core-don-t-abuse-__dma_sync_page.patch index 635ab0037e..d1849aefbb 100644 --- a/target/linux/apm821xx/patches-4.19/023-0004-crypto4xx_core-don-t-abuse-__dma_sync_page.patch +++ b/target/linux/apm821xx/patches-4.19/023-0004-crypto4xx_core-don-t-abuse-__dma_sync_page.patch @@ -19,7 +19,7 @@ Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> --- a/drivers/crypto/amcc/crypto4xx_core.c +++ b/drivers/crypto/amcc/crypto4xx_core.c -@@ -596,7 +596,7 @@ static void crypto4xx_aead_done(struct c +@@ -592,7 +592,7 @@ static void crypto4xx_aead_done(struct c pd->pd_ctl_len.bf.pkt_len, dst); } else { diff --git a/target/linux/apm821xx/patches-4.19/023-0006-crypto-crypto4xx-add-prng-crypto-support.patch b/target/linux/apm821xx/patches-4.19/023-0006-crypto-crypto4xx-add-prng-crypto-support.patch index ba4419787c..cf7f92c2d0 100644 --- a/target/linux/apm821xx/patches-4.19/023-0006-crypto-crypto4xx-add-prng-crypto-support.patch +++ b/target/linux/apm821xx/patches-4.19/023-0006-crypto-crypto4xx-add-prng-crypto-support.patch @@ -31,7 +31,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> #include <crypto/internal/skcipher.h> #include "crypto4xx_reg_def.h" #include "crypto4xx_core.h" -@@ -1046,6 +1048,10 @@ static int crypto4xx_register_alg(struct +@@ -1042,6 +1044,10 @@ static int crypto4xx_register_alg(struct rc = crypto_register_ahash(&alg->alg.u.hash); break; @@ -42,7 +42,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> default: rc = crypto_register_skcipher(&alg->alg.u.cipher); break; -@@ -1075,6 +1081,10 @@ static void crypto4xx_unregister_alg(str +@@ -1071,6 +1077,10 @@ static void crypto4xx_unregister_alg(str crypto_unregister_aead(&alg->alg.u.aead); break; @@ -53,7 +53,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> default: crypto_unregister_skcipher(&alg->alg.u.cipher); } -@@ -1133,6 +1143,69 @@ static irqreturn_t crypto4xx_ce_interrup +@@ -1129,6 +1139,69 @@ static irqreturn_t crypto4xx_ce_interrup PPC4XX_TMO_ERR_INT); } @@ -123,7 +123,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> /** * Supported Crypto Algorithms */ -@@ -1302,6 +1375,18 @@ static struct crypto4xx_alg_common crypt +@@ -1298,6 +1371,18 @@ static struct crypto4xx_alg_common crypt .cra_module = THIS_MODULE, }, } }, @@ -142,7 +142,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> }; /** -@@ -1371,6 +1456,7 @@ static int crypto4xx_probe(struct platfo +@@ -1367,6 +1452,7 @@ static int crypto4xx_probe(struct platfo core_dev->dev->core_dev = core_dev; core_dev->dev->is_revb = is_revb; core_dev->device = dev; @@ -150,7 +150,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> spin_lock_init(&core_dev->lock); INIT_LIST_HEAD(&core_dev->dev->alg_list); ratelimit_default_init(&core_dev->dev->aead_ratelimit); -@@ -1450,6 +1536,7 @@ static int crypto4xx_remove(struct platf +@@ -1446,6 +1532,7 @@ static int crypto4xx_remove(struct platf tasklet_kill(&core_dev->tasklet); /* Un-register with Linux CryptoAPI */ crypto4xx_unregister_alg(core_dev->dev); diff --git a/target/linux/apm821xx/patches-4.19/023-0012-crypto-crypto4xx-get-rid-of-redundant-using_sd-varia.patch b/target/linux/apm821xx/patches-4.19/023-0012-crypto-crypto4xx-get-rid-of-redundant-using_sd-varia.patch index 4b246a793d..24e34edd58 100644 --- a/target/linux/apm821xx/patches-4.19/023-0012-crypto-crypto4xx-get-rid-of-redundant-using_sd-varia.patch +++ b/target/linux/apm821xx/patches-4.19/023-0012-crypto-crypto4xx-get-rid-of-redundant-using_sd-varia.patch @@ -17,7 +17,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> --- a/drivers/crypto/amcc/crypto4xx_core.c +++ b/drivers/crypto/amcc/crypto4xx_core.c -@@ -539,7 +539,7 @@ static void crypto4xx_cipher_done(struct +@@ -535,7 +535,7 @@ static void crypto4xx_cipher_done(struct req = skcipher_request_cast(pd_uinfo->async_req); @@ -26,7 +26,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> crypto4xx_copy_pkt_to_dst(dev, pd, pd_uinfo, req->cryptlen, req->dst); } else { -@@ -593,7 +593,7 @@ static void crypto4xx_aead_done(struct c +@@ -589,7 +589,7 @@ static void crypto4xx_aead_done(struct c u32 icv[AES_BLOCK_SIZE]; int err = 0; @@ -35,7 +35,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> crypto4xx_copy_pkt_to_dst(dev, pd, pd_uinfo, pd->pd_ctl_len.bf.pkt_len, dst); -@@ -887,7 +887,6 @@ int crypto4xx_build_pd(struct crypto_asy +@@ -883,7 +883,6 @@ int crypto4xx_build_pd(struct crypto_asy * we know application give us dst a whole piece of memory * no need to use scatter ring. */ @@ -43,7 +43,7 @@ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> pd_uinfo->first_sd = 0xffffffff; sa->sa_command_0.bf.scatter = 0; pd->dest = (u32)dma_map_page(dev->core_dev->device, -@@ -901,7 +900,6 @@ int crypto4xx_build_pd(struct crypto_asy +@@ -897,7 +896,6 @@ int crypto4xx_build_pd(struct crypto_asy u32 sd_idx = fst_sd; nbytes = datalen; sa->sa_command_0.bf.scatter = 1; |