diff options
Diffstat (limited to 'package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_fix_bias_level.patch')
-rw-r--r-- | package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_fix_bias_level.patch | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_fix_bias_level.patch b/package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_fix_bias_level.patch deleted file mode 100644 index b883177b9f..0000000000 --- a/package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_fix_bias_level.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 4509e523dba46f789377cfec6f20579adf743416 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= <hacks+kernel@slashdirt.org> -Date: Sun, 17 Apr 2022 11:31:35 +0200 -Subject: [PATCH v2] ath9k: fix QCA9561 PA bias level -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch fixes an invalid TX PA DC bias level on QCA9561, which -results in a very low output power and very low throughput as devices -are further away from the AP (compared to other 2.4GHz APs). - -This patch was suggested by Felix Fietkau, who noted[1]: -"The value written to that register is wrong, because while the mask -definition AR_CH0_TOP2_XPABIASLVL uses a different value for 9561, the -shift definition AR_CH0_TOP2_XPABIASLVL_S is hardcoded to 12, which is -wrong for 9561." - -In real life testing, without this patch the 2.4GHz throughput on -Yuncore XD3200 is around 10Mbps sitting next to the AP, and closer to -practical maximum with the patch applied. - -[1] https://lore.kernel.org/all/91c58969-c60e-2f41-00ac-737786d435ae@nbd.name - -Signed-off-by: Thibaut VARĂˆNE <hacks+kernel@slashdirt.org> ---- -v2: Adjust #define per Felix's suggestion ---- - drivers/net/wireless/ath/ath9k/ar9003_phy.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h -+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h -@@ -720,7 +720,7 @@ - #define AR_CH0_TOP2 (AR_SREV_9300(ah) ? 0x1628c : \ - (AR_SREV_9462(ah) ? 0x16290 : 0x16284)) - #define AR_CH0_TOP2_XPABIASLVL (AR_SREV_9561(ah) ? 0x1e00 : 0xf000) --#define AR_CH0_TOP2_XPABIASLVL_S 12 -+#define AR_CH0_TOP2_XPABIASLVL_S (AR_SREV_9561(ah) ? 9 : 12) - - #define AR_CH0_XTAL (AR_SREV_9300(ah) ? 0x16294 : \ - ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x16298 : \ |