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-rw-r--r--package/kernel/mac80211/patches/658-0002-rtl8xxxu-Fix-rtl8192eu-driver-reload-issue.patch46
1 files changed, 46 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/658-0002-rtl8xxxu-Fix-rtl8192eu-driver-reload-issue.patch b/package/kernel/mac80211/patches/658-0002-rtl8xxxu-Fix-rtl8192eu-driver-reload-issue.patch
new file mode 100644
index 0000000000..ba7477b3d3
--- /dev/null
+++ b/package/kernel/mac80211/patches/658-0002-rtl8xxxu-Fix-rtl8192eu-driver-reload-issue.patch
@@ -0,0 +1,46 @@
+From 93064d0ae3e9d97c03a3aabd71e6048e1ac82f46 Mon Sep 17 00:00:00 2001
+From: Jes Sorensen <Jes.Sorensen@redhat.com>
+Date: Fri, 30 Sep 2016 19:18:34 -0400
+Subject: [PATCH] rtl8xxxu: Fix rtl8192eu driver reload issue
+
+The 8192eu suffered from two issues when reloading the driver.
+
+The same problems as with the 8723bu where REG_RX_WAIT_CCA bits 22 and
+23 didn't get set in rtl8192e_enable_rf().
+
+In addition it also seems prone to issues when setting REG_RF_CTRL to
+0 intead of just disabling the RF_ENABLE bit. Similar to what was
+causing issues with the 8188eu.
+
+With this patch I can successfully reload the driver and reassociate
+to an APi with an 8192eu dongle.
+
+Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
+---
+ drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
++++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
+@@ -1461,7 +1461,9 @@ static int rtl8192eu_active_to_emu(struc
+ int count, ret = 0;
+
+ /* Turn off RF */
+- rtl8xxxu_write8(priv, REG_RF_CTRL, 0);
++ val8 = rtl8xxxu_read8(priv, REG_RF_CTRL);
++ val8 &= ~RF_ENABLE;
++ rtl8xxxu_write8(priv, REG_RF_CTRL, val8);
+
+ /* Switch DPDT_SEL_P output from register 0x65[2] */
+ val8 = rtl8xxxu_read8(priv, REG_LEDCFG2);
+@@ -1593,6 +1595,10 @@ static void rtl8192e_enable_rf(struct rt
+ u32 val32;
+ u8 val8;
+
++ val32 = rtl8xxxu_read32(priv, REG_RX_WAIT_CCA);
++ val32 |= (BIT(22) | BIT(23));
++ rtl8xxxu_write32(priv, REG_RX_WAIT_CCA, val32);
++
+ val8 = rtl8xxxu_read8(priv, REG_GPIO_MUXCFG);
+ val8 |= BIT(5);
+ rtl8xxxu_write8(priv, REG_GPIO_MUXCFG, val8);