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-rw-r--r--package/kernel/mac80211/patches/330-v4.18-0005-brcmfmac-add-hostready-indication.patch74
1 files changed, 74 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/330-v4.18-0005-brcmfmac-add-hostready-indication.patch b/package/kernel/mac80211/patches/330-v4.18-0005-brcmfmac-add-hostready-indication.patch
new file mode 100644
index 0000000000..e3d4441f7f
--- /dev/null
+++ b/package/kernel/mac80211/patches/330-v4.18-0005-brcmfmac-add-hostready-indication.patch
@@ -0,0 +1,74 @@
+From 84ad327d18debe19b8d509059b61db445d048b02 Mon Sep 17 00:00:00 2001
+From: Franky Lin <franky.lin@broadcom.com>
+Date: Thu, 26 Apr 2018 12:16:50 +0200
+Subject: [PATCH] brcmfmac: add hostready indication
+
+A hostready signal is introduced to inform firmware through mailbox
+doorbell1 when common ring initialized or D3 exited.
+
+Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com>
+Signed-off-by: Franky Lin <franky.lin@broadcom.com>
+Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+ drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c | 14 ++++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
+@@ -105,7 +105,8 @@ static const struct brcmf_firmware_mappi
+ #define BRCMF_PCIE_PCIE2REG_MAILBOXMASK 0x4C
+ #define BRCMF_PCIE_PCIE2REG_CONFIGADDR 0x120
+ #define BRCMF_PCIE_PCIE2REG_CONFIGDATA 0x124
+-#define BRCMF_PCIE_PCIE2REG_H2D_MAILBOX 0x140
++#define BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_0 0x140
++#define BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_1 0x144
+
+ #define BRCMF_PCIE2_INTA 0x01
+ #define BRCMF_PCIE2_INTB 0x02
+@@ -140,6 +141,7 @@ static const struct brcmf_firmware_mappi
+ #define BRCMF_PCIE_SHARED_VERSION_MASK 0x00FF
+ #define BRCMF_PCIE_SHARED_DMA_INDEX 0x10000
+ #define BRCMF_PCIE_SHARED_DMA_2B_IDX 0x100000
++#define BRCMF_PCIE_SHARED_HOSTRDY_DB1 0x10000000
+
+ #define BRCMF_PCIE_FLAGS_HTOD_SPLIT 0x4000
+ #define BRCMF_PCIE_FLAGS_DTOH_SPLIT 0x8000
+@@ -782,6 +784,12 @@ static void brcmf_pcie_intr_enable(struc
+ BRCMF_PCIE_MB_INT_FN0_1);
+ }
+
++static void brcmf_pcie_hostready(struct brcmf_pciedev_info *devinfo)
++{
++ if (devinfo->shared.flags & BRCMF_PCIE_SHARED_HOSTRDY_DB1)
++ brcmf_pcie_write_reg32(devinfo,
++ BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_1, 1);
++}
+
+ static irqreturn_t brcmf_pcie_quick_check_isr(int irq, void *arg)
+ {
+@@ -924,7 +932,7 @@ static int brcmf_pcie_ring_mb_ring_bell(
+
+ brcmf_dbg(PCIE, "RING !\n");
+ /* Any arbitrary value will do, lets use 1 */
+- brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_H2D_MAILBOX, 1);
++ brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_0, 1);
+
+ return 0;
+ }
+@@ -1728,6 +1736,7 @@ static void brcmf_pcie_setup(struct devi
+ init_waitqueue_head(&devinfo->mbdata_resp_wait);
+
+ brcmf_pcie_intr_enable(devinfo);
++ brcmf_pcie_hostready(devinfo);
+ if (brcmf_attach(&devinfo->pdev->dev, devinfo->settings) == 0)
+ return;
+
+@@ -1950,6 +1959,7 @@ static int brcmf_pcie_pm_leave_D3(struct
+ brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2);
+ brcmf_bus_change_state(bus, BRCMF_BUS_UP);
+ brcmf_pcie_intr_enable(devinfo);
++ brcmf_pcie_hostready(devinfo);
+ return 0;
+ }
+