diff options
Diffstat (limited to 'package/boot')
| -rw-r--r-- | package/boot/uboot-sunxi/Makefile | 7 | ||||
| -rw-r--r-- | package/boot/uboot-sunxi/patches/252-sunxi-h3-add-support-for-nanopi-r1.patch | 198 |
2 files changed, 205 insertions, 0 deletions
diff --git a/package/boot/uboot-sunxi/Makefile b/package/boot/uboot-sunxi/Makefile index 4363445114..abdb263774 100644 --- a/package/boot/uboot-sunxi/Makefile +++ b/package/boot/uboot-sunxi/Makefile @@ -172,6 +172,12 @@ define U-Boot/nanopi_neo BUILD_DEVICES:=friendlyarm_nanopi-neo endef +define U-Boot/nanopi_r1 + BUILD_SUBTARGET:=cortexa7 + NAME:=U-Boot for NanoPi R1 (H3) + BUILD_DEVICES:=friendlyarm_nanopi-r1 +endef + define U-Boot/orangepi_r1 BUILD_SUBTARGET:=cortexa7 NAME:=Orange Pi R1 (H2+) @@ -310,6 +316,7 @@ UBOOT_TARGETS := \ nanopi_neo_air \ nanopi_neo_plus2 \ nanopi_neo2 \ + nanopi_r1 \ orangepi_zero \ orangepi_r1 \ orangepi_one \ diff --git a/package/boot/uboot-sunxi/patches/252-sunxi-h3-add-support-for-nanopi-r1.patch b/package/boot/uboot-sunxi/patches/252-sunxi-h3-add-support-for-nanopi-r1.patch new file mode 100644 index 0000000000..0db7be5421 --- /dev/null +++ b/package/boot/uboot-sunxi/patches/252-sunxi-h3-add-support-for-nanopi-r1.patch @@ -0,0 +1,198 @@ +From 0e8043aff1aae95d1f7b7422b91b57d9569860d3 Mon Sep 17 00:00:00 2001 +From: Jayantajit Gogoi <jayanta.gogoi525@gmail.com> +Date: Mon, 12 Oct 2020 18:39:53 +0000 +Subject: [PATCH] sunxi: add support for FriendlyARM NanoPi R1 + +Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com> +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/sun8i-h3-nanopi-r1.dts | 146 ++++++++++++++++++++++++++++ + configs/nanopi_r1_defconfig | 22 +++++ + 3 files changed, 169 insertions(+) + create mode 100644 arch/arm/dts/sun8i-h3-nanopi-r1.dts + create mode 100644 configs/nanopi_r1_defconfig + +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -531,6 +531,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \ + sun8i-h3-nanopi-m1-plus.dtb \ + sun8i-h3-nanopi-neo.dtb \ + sun8i-h3-nanopi-neo-air.dtb \ ++ sun8i-h3-nanopi-r1.dtb \ + sun8i-h3-orangepi-2.dtb \ + sun8i-h3-orangepi-lite.dtb \ + sun8i-h3-orangepi-one.dtb \ +--- /dev/null ++++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts +@@ -0,0 +1,146 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (C) 2019 Igor Pecovnik <igor@armbian.com> ++ * Copyright (C) 2020 Jayantajit Gogoi <jayanta.gogoi525@gmail.com> ++ */ ++ ++/* NanoPi R1 is based on the NanoPi-H3 design from FriendlyARM */ ++#include "sun8i-h3-nanopi.dtsi" ++ ++/ { ++ model = "FriendlyARM NanoPi R1"; ++ compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3"; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ vdd_cpux: gpio-regulator { ++ compatible = "regulator-gpio"; ++ pinctrl-names = "default"; ++ regulator-name = "vdd-cpux"; ++ regulator-type = "voltage"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-ramp-delay = <50>; ++ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; ++ gpios-states = <0x1>; ++ states = <1100000 0x0 ++ 1300000 0x1>; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; ++ }; ++ ++ leds { ++ /delete-node/ pwr; ++ status { ++ label = "nanopi:red:status"; ++ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan { ++ label = "nanopi:green:wan"; ++ gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ lan { ++ label = "nanopi:green:lan"; ++ gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ r_gpio_keys { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sw_r_npi>; ++ ++ /delete-node/ k1; ++ reset { ++ label = "reset"; ++ linux,code = <KEY_RESTART>; ++ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpux>; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&ehci2 { ++ status = "okay"; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; ++ ++&mmc1 { ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ sdio_wifi: sdio_wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ interrupt-parent = <&pio>; ++ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-names = "host-wake"; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ohci2 { ++ status = "okay"; ++}; ++ ++&r_pio { ++ sw_r_npi: key_pins { ++ pins = "PL3"; ++ function = "gpio_in"; ++ }; ++}; +--- /dev/null ++++ b/configs/nanopi_r1_defconfig +@@ -0,0 +1,22 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SPL=y ++CONFIG_MACH_SUN8I_H3=y ++CONFIG_DRAM_CLK=408 ++CONFIG_DRAM_ZQ=3881979 ++CONFIG_DRAM_ODT_EN=y ++CONFIG_MACPWR="PD6" ++# CONFIG_VIDEO_DE2 is not set ++CONFIG_NR_DRAM_BANKS=1 ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_CONSOLE_MUX=y ++CONFIG_SYS_CLK_FREQ=480000000 ++# CONFIG_CMD_FLASH is not set ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-r1" ++CONFIG_SUN8I_EMAC=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 |