1 files changed, 95 insertions, 0 deletions
diff --git a/package/boot/uboot-mediatek/patches/015-update-bananapi-bpi-r64-device-tree.patch b/package/boot/uboot-mediatek/patches/015-update-bananapi-bpi-r64-device-tree.patch
new file mode 100644
index 0000000000..8010107a65
--- /dev/null
+++ b/package/boot/uboot-mediatek/patches/015-update-bananapi-bpi-r64-device-tree.patch
@@ -0,0 +1,95 @@
+--- a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts
++++ b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts
+@@ -27,6 +27,42 @@
+ 		reg = <0x40000000 0x40000000>;
+ 	};
+ 
++	gpio-keys {
++		compatible = "gpio-keys";
++
++		reset {
++			label = "reset";
++			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
++		};
++
++		wps {
++			label = "wps";
++			gpios = <&gpio 102 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++/*
++ *		red {
++ *			label = "bpi-r64:pio:red";
++ *			gpios = <&gpio 88 GPIO_ACTIVE_HIGH>;
++ *			default-state = "off";
++ *		};
++ */
++		green {
++			label = "bpi-r64:pio:green";
++			gpios = <&gpio 89 GPIO_ACTIVE_HIGH>;
++			default-state = "off";
++		};
++
++		blue {
++			label = "bpi-r64:pio:blue";
++			gpios = <&gpio 85 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++		};
++	};
++
+ 	reg_1p8v: regulator-1p8v {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "fixed-1.8V";
+@@ -139,11 +163,12 @@
+ 
+ 	};
+ 
+-	mmc1_pins_default: mmc1default {
++	sd0_pins_default: sd0-pins-default {
+ 		mux {
+ 			function = "sd";
+-			groups =  "sd_0";
++			groups = "sd_0";
+ 		};
++
+ 		/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
+ 		 *  "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
+ 		 *  DAT2, DAT3, CMD, CLK for SD respectively.
+@@ -164,7 +189,6 @@
+ 			pins = "TXD3";
+ 			bias-pull-up;
+ 		};
+-
+ 	};
+ };
+ 
+@@ -199,7 +223,7 @@
+ 	status = "okay";
+ 	bus-width = <8>;
+ 	max-frequency = <50000000>;
+-	cap-sd-highspeed;
++	cap-mmc-highspeed;
+ 	vmmc-supply = <&reg_3p3v>;
+ 	vqmmc-supply = <&reg_3p3v>;
+ 	non-removable;
+@@ -207,14 +231,15 @@
+ 
+ &mmc1 {
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&mmc1_pins_default>;
++	pinctrl-0 = <&sd0_pins_default>;
+ 	status = "okay";
+ 	bus-width = <4>;
+-	max-frequency = <50000000>;
++	max-frequency = <20000000>;
+ 	cap-sd-highspeed;
+ 	r_smpl = <1>;
+ 	vmmc-supply = <&reg_3p3v>;
+ 	vqmmc-supply = <&reg_3p3v>;
++	cd-gpios = <&gpio 81 GPIO_ACTIVE_LOW>;
+ };
+ 
+ &watchdog {