diff options
Diffstat (limited to 'package/boot/uboot-mediatek/patches/002-0023-clk-mediatek-add-support-to-configure-clock-driver-p.patch')
| -rw-r--r-- | package/boot/uboot-mediatek/patches/002-0023-clk-mediatek-add-support-to-configure-clock-driver-p.patch | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/package/boot/uboot-mediatek/patches/002-0023-clk-mediatek-add-support-to-configure-clock-driver-p.patch b/package/boot/uboot-mediatek/patches/002-0023-clk-mediatek-add-support-to-configure-clock-driver-p.patch index 41600a96b5..c8af7e3191 100644 --- a/package/boot/uboot-mediatek/patches/002-0023-clk-mediatek-add-support-to-configure-clock-driver-p.patch +++ b/package/boot/uboot-mediatek/patches/002-0023-clk-mediatek-add-support-to-configure-clock-driver-p.patch @@ -1,7 +1,7 @@ -From cd4d6be5ed0488de2e0df9c388d89ad93d781caa Mon Sep 17 00:00:00 2001 +From 50859bea6a3334834b8250e7e5406507f0d0918a Mon Sep 17 00:00:00 2001 From: Weijie Gao <weijie.gao@mediatek.com> -Date: Fri, 29 Jul 2022 10:57:05 +0800 -Subject: [PATCH 23/31] clk: mediatek: add support to configure clock driver +Date: Wed, 31 Aug 2022 19:05:06 +0800 +Subject: [PATCH 23/32] clk: mediatek: add support to configure clock driver parent This patch adds support for a clock node to configure its parent clock @@ -50,14 +50,14 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> break; case CLK_PARENT_TOPCKGEN: rate = mtk_clk_find_parent_rate(clk, fdiv->parent, NULL); -@@ -322,9 +316,18 @@ static ulong mtk_topckgen_get_mux_rate(s +@@ -321,9 +315,18 @@ static ulong mtk_topckgen_get_mux_rate(s - if (mux->parent[index] == CLK_XTAL && priv->tree->flags & CLK_BYPASS_XTAL) - flag = 1; -- if (mux->parent[index] > 0 || flag == 1) + if (mux->parent[index] > 0 || + (mux->parent[index] == CLK_XTAL && +- priv->tree->flags & CLK_BYPASS_XTAL)) - return mtk_clk_find_parent_rate(clk, mux->parent[index], - NULL); -+ if (mux->parent[index] > 0 || flag == 1) { ++ priv->tree->flags & CLK_BYPASS_XTAL)) { + switch (mux->flags & CLK_PARENT_MASK) { + case CLK_PARENT_APMIXED: + return mtk_clk_find_parent_rate(clk, mux->parent[index], @@ -72,7 +72,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> return priv->tree->xtal_rate; } -@@ -343,7 +346,7 @@ static ulong mtk_topckgen_get_rate(struc +@@ -342,7 +345,7 @@ static ulong mtk_topckgen_get_rate(struc priv->tree->muxes_offs); } @@ -81,7 +81,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); const struct mtk_composite *mux; -@@ -376,7 +379,7 @@ static int mtk_topckgen_enable(struct cl +@@ -375,7 +378,7 @@ static int mtk_topckgen_enable(struct cl return 0; } @@ -90,7 +90,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); const struct mtk_composite *mux; -@@ -402,7 +405,7 @@ static int mtk_topckgen_disable(struct c +@@ -401,7 +404,7 @@ static int mtk_topckgen_disable(struct c return 0; } @@ -99,7 +99,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); -@@ -474,19 +477,7 @@ static ulong mtk_clk_gate_get_rate(struc +@@ -473,19 +476,7 @@ static ulong mtk_clk_gate_get_rate(struc struct mtk_cg_priv *priv = dev_get_priv(clk->dev); const struct mtk_gate *gate = &priv->gates[clk->id]; @@ -120,7 +120,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> } const struct clk_ops mtk_clk_apmixedsys_ops = { -@@ -497,10 +488,10 @@ const struct clk_ops mtk_clk_apmixedsys_ +@@ -496,10 +487,10 @@ const struct clk_ops mtk_clk_apmixedsys_ }; const struct clk_ops mtk_clk_topckgen_ops = { @@ -134,7 +134,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> }; const struct clk_ops mtk_clk_gate_ops = { -@@ -513,11 +504,22 @@ int mtk_common_clk_init(struct udevice * +@@ -512,11 +503,22 @@ int mtk_common_clk_init(struct udevice * const struct mtk_clk_tree *tree) { struct mtk_clk_priv *priv = dev_get_priv(dev); @@ -157,7 +157,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> priv->tree = tree; return 0; -@@ -528,11 +530,22 @@ int mtk_common_clk_gate_init(struct udev +@@ -527,11 +529,22 @@ int mtk_common_clk_gate_init(struct udev const struct mtk_gate *gates) { struct mtk_cg_priv *priv = dev_get_priv(dev); |