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-rw-r--r--package/boot/uboot-layerscape/patches/0067-armv8-ls1012a-DDR-optmizations.patch90
1 files changed, 90 insertions, 0 deletions
diff --git a/package/boot/uboot-layerscape/patches/0067-armv8-ls1012a-DDR-optmizations.patch b/package/boot/uboot-layerscape/patches/0067-armv8-ls1012a-DDR-optmizations.patch
new file mode 100644
index 0000000000..7c532fb9fd
--- /dev/null
+++ b/package/boot/uboot-layerscape/patches/0067-armv8-ls1012a-DDR-optmizations.patch
@@ -0,0 +1,90 @@
+From 8b6c309e5e55670f429730449d9921987636c8ec Mon Sep 17 00:00:00 2001
+From: Calvin Johnson <calvin.johnson@freescale.com>
+Date: Wed, 8 Jun 2016 17:04:58 +0530
+Subject: [PATCH 67/93] armv8: ls1012a: DDR optmizations
+
+Enable DDR row-bank-column decoding. DDR address will
+be decoded as row-bank-column instead of bank-row-column.
+This will improve performance of serial data transfers.
+
+Refresh cycle value must be selected based on the frequency
+of DDR. tREFI = 7.8 us as per JEDEC. The value for MDREF[REF_CNT]
+should be based on round up (tREFI/tCK) formula. For 500MHz, mdref
+value should be 0x0f3c8000.
+
+Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
+---
+ board/freescale/ls1012afrdm/ls1012afrdm.c | 4 ++--
+ board/freescale/ls1012aqds/ls1012aqds.c | 4 ++--
+ board/freescale/ls1012ardb/ls1012ardb.c | 4 ++--
+ 3 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c
+index c691a76..4b7902a 100644
+--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
++++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
+@@ -59,7 +59,7 @@ void mmdc_init(void)
+ out_be32(&mmdc->mdcfg2, 0x01ff00db);
+
+ /* other parms */
+- out_be32(&mmdc->mdmisc, 0x00000680);
++ out_be32(&mmdc->mdmisc, 0x00001680);
+ out_be32(&mmdc->mpmur0, 0x00000800);
+ out_be32(&mmdc->mdrwd, 0x00002000);
+ out_be32(&mmdc->mpodtctrl, 0x0000022a);
+@@ -118,7 +118,7 @@ void mmdc_init(void)
+ out_be32(&mmdc->mapsr, 0x00001067);
+
+ /* refresh scheme */
+- set_wait_for_bits_clear(&mmdc->mdref, 0x103e8000, 0x00000001);
++ set_wait_for_bits_clear(&mmdc->mdref, 0x0f3c8000, 0x00000001);
+
+ /* disable CON_REQ */
+ out_be32(&mmdc->mdscr, 0x0);
+diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
+index 516f0c3..4ae8def 100644
+--- a/board/freescale/ls1012aqds/ls1012aqds.c
++++ b/board/freescale/ls1012aqds/ls1012aqds.c
+@@ -82,7 +82,7 @@ void mmdc_init(void)
+ out_be32(&mmdc->mdcfg2, 0x01ff00db);
+
+ /* other parms */
+- out_be32(&mmdc->mdmisc, 0x00000680);
++ out_be32(&mmdc->mdmisc, 0x00001680);
+ out_be32(&mmdc->mpmur0, 0x00000800);
+ out_be32(&mmdc->mdrwd, 0x00002000);
+ out_be32(&mmdc->mpodtctrl, 0x0000022a);
+@@ -142,7 +142,7 @@ void mmdc_init(void)
+ out_be32(&mmdc->mapsr, 0x00001067);
+
+ /* refresh scheme */
+- set_wait_for_bits_clear(&mmdc->mdref, 0x103e8000, 0x00000001);
++ set_wait_for_bits_clear(&mmdc->mdref, 0x0f3c8000, 0x00000001);
+
+ /* disable CON_REQ */
+ out_be32(&mmdc->mdscr, 0x0);
+diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
+index 7f7503c..06e1f6b 100644
+--- a/board/freescale/ls1012ardb/ls1012ardb.c
++++ b/board/freescale/ls1012ardb/ls1012ardb.c
+@@ -88,7 +88,7 @@ void mmdc_init(void)
+ out_be32(&mmdc->mdcfg2, 0x01ff00db);
+
+ /* other parms */
+- out_be32(&mmdc->mdmisc, 0x00000680);
++ out_be32(&mmdc->mdmisc, 0x00001680);
+ out_be32(&mmdc->mpmur0, 0x00000800);
+ out_be32(&mmdc->mdrwd, 0x00002000);
+ out_be32(&mmdc->mpodtctrl, 0x0000022a);
+@@ -148,7 +148,7 @@ void mmdc_init(void)
+ out_be32(&mmdc->mapsr, 0x00001067);
+
+ /* refresh scheme */
+- set_wait_for_bits_clear(&mmdc->mdref, 0x103e8000, 0x00000001);
++ set_wait_for_bits_clear(&mmdc->mdref, 0x0f3c8000, 0x00000001);
+
+ /* disable CON_REQ */
+ out_be32(&mmdc->mdscr, 0x0);
+--
+1.7.9.5
+