1 files changed, 38 insertions, 0 deletions
diff --git a/package/boot/uboot-layerscape/patches/0011-armv8-fsl-layerscape-fix-compile-warning-rcw_tmp.patch b/package/boot/uboot-layerscape/patches/0011-armv8-fsl-layerscape-fix-compile-warning-rcw_tmp.patch
new file mode 100644
index 0000000000..6448acbd26
--- /dev/null
+++ b/package/boot/uboot-layerscape/patches/0011-armv8-fsl-layerscape-fix-compile-warning-rcw_tmp.patch
@@ -0,0 +1,38 @@
+From 5a5108627b16ab33fb82c16e49ac926ef3a901b8 Mon Sep 17 00:00:00 2001
+From: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
+Date: Wed, 6 Apr 2016 17:44:22 +0530
+Subject: [PATCH 11/93] armv8: fsl-layerscape: fix compile warning "rcw_tmp"
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c: In function
+‘get_sys_info’:
+arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c:29:6: warning:
+unused variable ‘rcw_tmp’ [-Wunused-variable]
+  u32 rcw_tmp;
+
+Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
+---
+ .../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c |    5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+index d301fff..078b087 100644
+--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
++++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+@@ -25,7 +25,10 @@ void get_sys_info(struct sys_info *sys_info)
+ 	struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
+ 	u32 ccr;
+ #endif
+-#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_SYS_DPAA_FMAN)
++#if (defined(CONFIG_FSL_ESDHC) &&\
++	defined(CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK)) ||\
++	defined(CONFIG_SYS_DPAA_FMAN)
++
+ 	u32 rcw_tmp;
+ #endif
+ 	struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_CLK_ADDR);
+-- 
+1.7.9.5
+