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-rw-r--r--package/boot/arm-trusted-firmware-mvebu/patches/100-fix-plat-marvell-a3720-uart-fix-UART-clock-rate-valu.patch60
1 files changed, 60 insertions, 0 deletions
diff --git a/package/boot/arm-trusted-firmware-mvebu/patches/100-fix-plat-marvell-a3720-uart-fix-UART-clock-rate-valu.patch b/package/boot/arm-trusted-firmware-mvebu/patches/100-fix-plat-marvell-a3720-uart-fix-UART-clock-rate-valu.patch
new file mode 100644
index 0000000000..6f887411b4
--- /dev/null
+++ b/package/boot/arm-trusted-firmware-mvebu/patches/100-fix-plat-marvell-a3720-uart-fix-UART-clock-rate-valu.patch
@@ -0,0 +1,60 @@
+From 66a7752834382595d26214783ae4698fd1f00bd6 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
+Date: Thu, 13 May 2021 14:53:44 +0200
+Subject: [PATCH] fix(plat/marvell/a3720/uart): fix UART clock rate value and
+ divisor calculation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+UART parent clock is by default the platform's xtal clock, which is
+25 MHz.
+
+The value defined in the driver, though, is 25.8048 MHz. This is a hack
+for the suboptimal divisor calculation
+ Divisor = UART clock / (16 * baudrate)
+which does not use rounding division, resulting in a suboptimal value
+for divisor if the correct parent clock rate was used.
+
+Change the code for divisor calculation to
+ Divisor = Round(UART clock / (16 * baudrate))
+and change the parent clock rate value to 25 MHz.
+
+The final UART divisor for default baudrate 115200 is not affected by
+this change.
+
+(Note that the parent clock rate should not be defined via a macro,
+since the xtal clock can also be 40 MHz. This is outside of the scope of
+this fix, though.)
+
+Signed-off-by: Pali Rohár <pali@kernel.org>
+Change-Id: Iaa401173df87aec94f2dd1b38a90fb6ed0bf0ec6
+---
+ drivers/marvell/uart/a3700_console.S | 3 ++-
+ plat/marvell/armada/a3k/common/include/platform_def.h | 2 +-
+ 2 files changed, 3 insertions(+), 2 deletions(-)
+
+--- a/drivers/marvell/uart/a3700_console.S
++++ b/drivers/marvell/uart/a3700_console.S
+@@ -45,8 +45,9 @@ func console_a3700_core_init
+ cbz w2, init_fail
+
+ /* Program the baudrate */
+- /* Divisor = Uart clock / (16 * baudrate) */
++ /* Divisor = Round(Uartclock / (16 * baudrate)) */
+ lsl w2, w2, #4
++ add w1, w1, w2, lsr #1
+ udiv w2, w1, w2
+ and w2, w2, #0x3ff
+
+--- a/plat/marvell/armada/a3k/common/include/platform_def.h
++++ b/plat/marvell/armada/a3k/common/include/platform_def.h
+@@ -164,7 +164,7 @@
+ * PL011 related constants
+ */
+ #define PLAT_MARVELL_BOOT_UART_BASE (MVEBU_REGS_BASE + 0x12000)
+-#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 25804800
++#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 25000000
+
+ #define PLAT_MARVELL_CRASH_UART_BASE PLAT_MARVELL_BOOT_UART_BASE
+ #define PLAT_MARVELL_CRASH_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ