diff options
| -rw-r--r-- | package/mac80211/patches/620-rt2x00-support-rt3352.patch | 445 |
1 files changed, 445 insertions, 0 deletions
diff --git a/package/mac80211/patches/620-rt2x00-support-rt3352.patch b/package/mac80211/patches/620-rt2x00-support-rt3352.patch new file mode 100644 index 0000000000..727eb24df6 --- /dev/null +++ b/package/mac80211/patches/620-rt2x00-support-rt3352.patch @@ -0,0 +1,445 @@ +--- a/drivers/net/wireless/rt2x00/rt2800lib.c ++++ b/drivers/net/wireless/rt2x00/rt2800lib.c +@@ -1547,6 +1547,7 @@ void rt2800_config_ant(struct rt2x00_dev + case 1: + if (rt2x00_rt(rt2x00dev, RT3070) || + rt2x00_rt(rt2x00dev, RT3090) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT3390)) { + rt2x00_eeprom_read(rt2x00dev, + EEPROM_NIC_CONF1, &eeprom); +@@ -1985,6 +1986,58 @@ static void rt2800_config_channel_rf3290 + } + } + ++static void rt2800_config_channel_rf3322(struct rt2x00_dev *rt2x00dev, ++ struct ieee80211_conf *conf, ++ struct rf_channel *rf, ++ struct channel_info *info) ++{ ++ u8 rfcsr; ++ ++ rt2800_rfcsr_write(rt2x00dev, 8, rf->rf1); ++ rt2800_rfcsr_write(rt2x00dev, 9, rf->rf3); ++ ++ rt2800_rfcsr_write(rt2x00dev, 11, 0x42); ++ rt2800_rfcsr_write(rt2x00dev, 12, 0x1C); ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x00); ++ ++ if (info->default_power1 > POWER_BOUND) ++ rt2800_rfcsr_write(rt2x00dev, 47, POWER_BOUND); ++ else ++ rt2800_rfcsr_write(rt2x00dev, 47, info->default_power1); ++ ++ if (info->default_power2 > POWER_BOUND) ++ rt2800_rfcsr_write(rt2x00dev, 48, POWER_BOUND); ++ else ++ rt2800_rfcsr_write(rt2x00dev, 48, info->default_power2); ++ ++ rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr); ++ if (rt2x00dev->freq_offset > FREQ_OFFSET_BOUND) ++ rt2x00_set_field8(&rfcsr, RFCSR17_CODE, ++ FREQ_OFFSET_BOUND); ++ else ++ rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset); ++ ++ rt2800_rfcsr_write(rt2x00dev, 17, rfcsr); ++ ++ rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr); ++ rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); ++ rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1); ++ rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1); ++ rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1); ++ rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0); ++ rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0); ++ ++ if ( rt2x00dev->default_ant.tx_chain_num == 1 ) ++ rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0); ++ ++ if ( rt2x00dev->default_ant.rx_chain_num == 1 ) ++ rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0); ++ ++ rt2800_rfcsr_write(rt2x00dev, 1, rfcsr); ++ ++ rt2800_rfcsr_write(rt2x00dev, 31, 80); ++} ++ + static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev, + struct ieee80211_conf *conf, + struct rf_channel *rf, +@@ -2114,6 +2167,9 @@ static void rt2800_config_channel(struct + case RF3290: + rt2800_config_channel_rf3290(rt2x00dev, conf, rf, info); + break; ++ case RF3322: ++ rt2800_config_channel_rf3322(rt2x00dev, conf, rf, info); ++ break; + case RF5360: + case RF5370: + case RF5372: +@@ -2126,6 +2182,7 @@ static void rt2800_config_channel(struct + } + + if (rt2x00_rf(rt2x00dev, RF3290) || ++ rt2x00_rf(rt2x00dev, RF3322) || + rt2x00_rf(rt2x00dev, RF5360) || + rt2x00_rf(rt2x00dev, RF5370) || + rt2x00_rf(rt2x00dev, RF5372) || +@@ -2144,10 +2201,20 @@ static void rt2800_config_channel(struct + /* + * Change BBP settings + */ +- rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain); +- rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain); +- rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain); +- rt2800_bbp_write(rt2x00dev, 86, 0); ++ if (rt2x00_rt(rt2x00dev, RT3352)) ++ { ++ rt2800_bbp_write(rt2x00dev, 27, 0x0); ++ rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain); ++ rt2800_bbp_write(rt2x00dev, 27, 0x20); ++ rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain); ++ } ++ else ++ { ++ rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain); ++ rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain); ++ rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain); ++ rt2800_bbp_write(rt2x00dev, 86, 0); ++ } + + if (rf->channel <= 14) { + if (!rt2x00_rt(rt2x00dev, RT5390) && +@@ -2242,6 +2309,16 @@ static void rt2800_config_channel(struct + rt2800_register_read(rt2x00dev, CH_IDLE_STA, ®); + rt2800_register_read(rt2x00dev, CH_BUSY_STA, ®); + rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC, ®); ++ ++ /* ++ * Clear update flag ++ */ ++ if (rt2x00_rt(rt2x00dev, RT3352)) ++ { ++ rt2800_bbp_read(rt2x00dev, 49, &bbp); ++ rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0); ++ rt2800_bbp_write(rt2x00dev, 49, bbp); ++ } + } + + static int rt2800_get_gain_calibration_delta(struct rt2x00_dev *rt2x00dev) +@@ -2893,11 +2970,15 @@ static int rt2800_init_registers(struct + if (rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3290) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT3390)) { + + if (rt2x00_rt(rt2x00dev, RT3290)) + rt2800_register_write(rt2x00dev, TX_SW_CFG0, + 0x00000404); ++ else if (rt2x00_rt(rt2x00dev, RT3352)) ++ rt2800_register_write(rt2x00dev, TX_SW_CFG0, ++ 0x00000402); + else + rt2800_register_write(rt2x00dev, TX_SW_CFG0, + 0x00000400); +@@ -3310,6 +3391,11 @@ static int rt2800_init_bbp(struct rt2x00 + rt2800_wait_bbp_ready(rt2x00dev))) + return -EACCES; + ++ if (rt2x00_rt(rt2x00dev, RT3352)) { ++ rt2800_bbp_write(rt2x00dev, 3, 0x00); ++ rt2800_bbp_write(rt2x00dev, 4, 0x50); ++ } ++ + if (rt2x00_rt(rt2x00dev, RT3290) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) { +@@ -3320,15 +3406,20 @@ static int rt2800_init_bbp(struct rt2x00 + + if (rt2800_is_305x_soc(rt2x00dev) || + rt2x00_rt(rt2x00dev, RT3290) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT3572) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 31, 0x08); + ++ if (rt2x00_rt(rt2x00dev, RT3352)) ++ rt2800_bbp_write(rt2x00dev, 47, 0x48); ++ + rt2800_bbp_write(rt2x00dev, 65, 0x2c); + rt2800_bbp_write(rt2x00dev, 66, 0x38); + + if (rt2x00_rt(rt2x00dev, RT3290) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 68, 0x0b); +@@ -3337,6 +3428,7 @@ static int rt2800_init_bbp(struct rt2x00 + rt2800_bbp_write(rt2x00dev, 69, 0x16); + rt2800_bbp_write(rt2x00dev, 73, 0x12); + } else if (rt2x00_rt(rt2x00dev, RT3290) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 69, 0x12); +@@ -3368,6 +3460,10 @@ static int rt2800_init_bbp(struct rt2x00 + } else if (rt2800_is_305x_soc(rt2x00dev)) { + rt2800_bbp_write(rt2x00dev, 78, 0x0e); + rt2800_bbp_write(rt2x00dev, 80, 0x08); ++ } else if (rt2x00_rt(rt2x00dev, RT3352)) { ++ rt2800_bbp_write(rt2x00dev, 78, 0x0e); ++ rt2800_bbp_write(rt2x00dev, 80, 0x08); ++ rt2800_bbp_write(rt2x00dev, 81, 0x37); + } else { + rt2800_bbp_write(rt2x00dev, 81, 0x37); + } +@@ -3397,18 +3493,21 @@ static int rt2800_init_bbp(struct rt2x00 + rt2800_bbp_write(rt2x00dev, 84, 0x99); + + if (rt2x00_rt(rt2x00dev, RT3290) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 86, 0x38); + else + rt2800_bbp_write(rt2x00dev, 86, 0x00); + +- if (rt2x00_rt(rt2x00dev, RT5392)) ++ if (rt2x00_rt(rt2x00dev, RT5392) || ++ rt2x00_rt(rt2x00dev, RT3352)) + rt2800_bbp_write(rt2x00dev, 88, 0x90); + + rt2800_bbp_write(rt2x00dev, 91, 0x04); + + if (rt2x00_rt(rt2x00dev, RT3290) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 92, 0x02); +@@ -3425,6 +3524,7 @@ static int rt2800_init_bbp(struct rt2x00 + rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || + rt2x00_rt(rt2x00dev, RT3290) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT3572) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392) || +@@ -3434,6 +3534,7 @@ static int rt2800_init_bbp(struct rt2x00 + rt2800_bbp_write(rt2x00dev, 103, 0x00); + + if (rt2x00_rt(rt2x00dev, RT3290) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 104, 0x92); +@@ -3442,6 +3543,8 @@ static int rt2800_init_bbp(struct rt2x00 + rt2800_bbp_write(rt2x00dev, 105, 0x01); + else if (rt2x00_rt(rt2x00dev, RT3290)) + rt2800_bbp_write(rt2x00dev, 105, 0x1c); ++ else if (rt2x00_rt(rt2x00dev, RT3352)) ++ rt2800_bbp_write(rt2x00dev, 105, 0x34); + else if (rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 105, 0x3c); +@@ -3451,11 +3554,16 @@ static int rt2800_init_bbp(struct rt2x00 + if (rt2x00_rt(rt2x00dev, RT3290) || + rt2x00_rt(rt2x00dev, RT5390)) + rt2800_bbp_write(rt2x00dev, 106, 0x03); ++ else if (rt2x00_rt(rt2x00dev, RT3352)) ++ rt2800_bbp_write(rt2x00dev, 106, 0x05); + else if (rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 106, 0x12); + else + rt2800_bbp_write(rt2x00dev, 106, 0x35); + ++ if (rt2x00_rt(rt2x00dev, RT3352)) ++ rt2800_bbp_write(rt2x00dev, 120, 0x50); ++ + if (rt2x00_rt(rt2x00dev, RT3290) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) +@@ -3466,6 +3574,9 @@ static int rt2800_init_bbp(struct rt2x00 + rt2800_bbp_write(rt2x00dev, 135, 0xf6); + } + ++ if (rt2x00_rt(rt2x00dev, RT3352)) ++ rt2800_bbp_write(rt2x00dev, 137, 0x0F); ++ + if (rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || +@@ -3506,6 +3617,28 @@ static int rt2800_init_bbp(struct rt2x00 + rt2800_bbp_write(rt2x00dev, 3, value); + } + ++ if (rt2x00_rt(rt2x00dev, RT3352)) { ++ rt2800_bbp_write(rt2x00dev, 163, 0xBD); ++ /* Set ITxBF timeout to 0x9C40=1000msec */ ++ rt2800_bbp_write(rt2x00dev, 179, 0x02); ++ rt2800_bbp_write(rt2x00dev, 180, 0x00); ++ rt2800_bbp_write(rt2x00dev, 182, 0x40); ++ rt2800_bbp_write(rt2x00dev, 180, 0x01); ++ rt2800_bbp_write(rt2x00dev, 182, 0x9C); ++ rt2800_bbp_write(rt2x00dev, 179, 0x00); ++ /* Reprogram the inband interface to put right values in RXWI */ ++ rt2800_bbp_write(rt2x00dev, 142, 0x04); ++ rt2800_bbp_write(rt2x00dev, 143, 0x3b); ++ rt2800_bbp_write(rt2x00dev, 142, 0x06); ++ rt2800_bbp_write(rt2x00dev, 143, 0xA0); ++ rt2800_bbp_write(rt2x00dev, 142, 0x07); ++ rt2800_bbp_write(rt2x00dev, 143, 0xA1); ++ rt2800_bbp_write(rt2x00dev, 142, 0x08); ++ rt2800_bbp_write(rt2x00dev, 143, 0xA2); ++ ++ rt2800_bbp_write(rt2x00dev, 148, 0xC8); ++ } ++ + if (rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) { + int ant, div_mode; +@@ -3639,6 +3772,7 @@ static int rt2800_init_rfcsr(struct rt2x + !rt2x00_rt(rt2x00dev, RT3071) && + !rt2x00_rt(rt2x00dev, RT3090) && + !rt2x00_rt(rt2x00dev, RT3290) && ++ !rt2x00_rt(rt2x00dev, RT3352) && + !rt2x00_rt(rt2x00dev, RT3390) && + !rt2x00_rt(rt2x00dev, RT3572) && + !rt2x00_rt(rt2x00dev, RT5390) && +@@ -3835,6 +3969,71 @@ static int rt2800_init_rfcsr(struct rt2x + rt2800_rfcsr_write(rt2x00dev, 30, 0x00); + rt2800_rfcsr_write(rt2x00dev, 31, 0x00); + return 0; ++ } else if (rt2x00_rt(rt2x00dev, RT3352)) { ++ rt2800_rfcsr_write(rt2x00dev, 0, 0xF0); ++ rt2800_rfcsr_write(rt2x00dev, 1, 0x23); ++ rt2800_rfcsr_write(rt2x00dev, 2, 0x50); ++ rt2800_rfcsr_write(rt2x00dev, 3, 0x18); ++ rt2800_rfcsr_write(rt2x00dev, 4, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 5, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 6, 0x33); ++ rt2800_rfcsr_write(rt2x00dev, 7, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 8, 0xF1); ++ rt2800_rfcsr_write(rt2x00dev, 9, 0x02); ++ rt2800_rfcsr_write(rt2x00dev, 10, 0xD2); ++ rt2800_rfcsr_write(rt2x00dev, 11, 0x42); ++ rt2800_rfcsr_write(rt2x00dev, 12, 0x1C); ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 14, 0x5A); ++ rt2800_rfcsr_write(rt2x00dev, 15, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 16, 0x01); ++/* rt2800_rfcsr_write(rt2x00dev, 17, 0x1A); */ ++ rt2800_rfcsr_write(rt2x00dev, 18, 0x45); ++ rt2800_rfcsr_write(rt2x00dev, 19, 0x02); ++ rt2800_rfcsr_write(rt2x00dev, 20, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 21, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 22, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 23, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 24, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 25, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 26, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 27, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 28, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 29, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 30, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 31, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 32, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 33, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 34, 0x01); ++ rt2800_rfcsr_write(rt2x00dev, 35, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 36, 0xBD); ++ rt2800_rfcsr_write(rt2x00dev, 37, 0x3C); ++ rt2800_rfcsr_write(rt2x00dev, 38, 0x5F); ++ rt2800_rfcsr_write(rt2x00dev, 39, 0xC5); ++ rt2800_rfcsr_write(rt2x00dev, 40, 0x33); ++ rt2800_rfcsr_write(rt2x00dev, 41, 0x5B); ++ rt2800_rfcsr_write(rt2x00dev, 42, 0x5B); ++ rt2800_rfcsr_write(rt2x00dev, 43, 0xDB); ++ rt2800_rfcsr_write(rt2x00dev, 44, 0xDB); ++ rt2800_rfcsr_write(rt2x00dev, 45, 0xDB); ++ rt2800_rfcsr_write(rt2x00dev, 46, 0xDD); ++ rt2800_rfcsr_write(rt2x00dev, 47, 0x0D); ++ rt2800_rfcsr_write(rt2x00dev, 48, 0x14); ++ rt2800_rfcsr_write(rt2x00dev, 49, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 50, 0x2D); ++ rt2800_rfcsr_write(rt2x00dev, 51, 0x7F); ++ rt2800_rfcsr_write(rt2x00dev, 52, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 53, 0x52); ++ rt2800_rfcsr_write(rt2x00dev, 54, 0x1B); ++ rt2800_rfcsr_write(rt2x00dev, 55, 0x7F); ++ rt2800_rfcsr_write(rt2x00dev, 56, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 57, 0x52); ++ rt2800_rfcsr_write(rt2x00dev, 58, 0x1B); ++ rt2800_rfcsr_write(rt2x00dev, 59, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 60, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 61, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 62, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 63, 0x00); + } else if (rt2x00_rt(rt2x00dev, RT5390)) { + rt2800_rfcsr_write(rt2x00dev, 1, 0x0f); + rt2800_rfcsr_write(rt2x00dev, 2, 0x80); +@@ -4035,6 +4234,7 @@ static int rt2800_init_rfcsr(struct rt2x + rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19); + } else if (rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572)) { + drv_data->calibration_bw20 = +@@ -4493,6 +4693,7 @@ int rt2800_init_eeprom(struct rt2x00_dev + case RT3071: + case RT3090: + case RT3290: ++ case RT3352: + case RT3390: + case RT3572: + case RT5390: +@@ -4515,6 +4716,7 @@ int rt2800_init_eeprom(struct rt2x00_dev + case RF3052: + case RF3290: + case RF3320: ++ case RF3322: + case RF5360: + case RF5370: + case RF5372: +@@ -4539,6 +4741,7 @@ int rt2800_init_eeprom(struct rt2x00_dev + + if (rt2x00_rt(rt2x00dev, RT3070) || + rt2x00_rt(rt2x00dev, RT3090) || ++ rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT3390)) { + value = rt2x00_get_field16(eeprom, + EEPROM_NIC_CONF1_ANT_DIVERSITY); +@@ -4832,6 +5035,7 @@ int rt2800_probe_hw_mode(struct rt2x00_d + rt2x00_rf(rt2x00dev, RF3022) || + rt2x00_rf(rt2x00dev, RF3290) || + rt2x00_rf(rt2x00dev, RF3320) || ++ rt2x00_rf(rt2x00dev, RF3322) || + rt2x00_rf(rt2x00dev, RF5360) || + rt2x00_rf(rt2x00dev, RF5370) || + rt2x00_rf(rt2x00dev, RF5372) || +--- a/drivers/net/wireless/rt2x00/rt2x00.h ++++ b/drivers/net/wireless/rt2x00/rt2x00.h +@@ -189,6 +189,7 @@ struct rt2x00_chip { + #define RT3071 0x3071 + #define RT3090 0x3090 /* 2.4GHz PCIe */ + #define RT3290 0x3290 ++#define RT3352 0x3352 /* WSOC */ + #define RT3390 0x3390 + #define RT3572 0x3572 + #define RT3593 0x3593 +--- a/drivers/net/wireless/rt2x00/rt2800.h ++++ b/drivers/net/wireless/rt2x00/rt2800.h +@@ -1936,6 +1936,11 @@ struct mac_iveiv_entry { + #define BBP47_TSSI_ADC6 FIELD8(0x80) + + /* ++ * BBP 49 ++ */ ++#define BBP49_UPDATE_FLAG FIELD8(0x01) ++ ++/* + * BBP 109 + */ + #define BBP109_TX0_POWER FIELD8(0x0f) |