diff options
4 files changed, 485 insertions, 7 deletions
diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile index c71ed67f58..269c9e5db5 100644 --- a/package/boot/uboot-mediatek/Makefile +++ b/package/boot/uboot-mediatek/Makefile @@ -54,6 +54,17 @@ define U-Boot/mt7622_bananapi_bpi-r64-sdmmc DEPENDS:=+trusted-firmware-a-mt7622-sdmmc-2ddr endef +define U-Boot/mt7622_ubnt_unifi-6-lr + NAME:=Ubiquiti UniFi 6 LR + UBOOT_CONFIG:=mt7622_ubnt_unifi-6-lr + BUILD_DEVICES:=ubnt_unifi-6-lr-ubootmod + BUILD_SUBTARGET:=mt7622 + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=nor + BL2_DDRBLOB:=2 + DEPENDS:=+trusted-firmware-a-mt7622-nor-2ddr +endef + define U-Boot/mt7623a_unielec_u7623 NAME:=UniElec U7623 (mt7623) BUILD_DEVICES:=unielec_u7623-emmc unielec_u7623-02-emmc-512m-legacy @@ -81,6 +92,7 @@ UBOOT_TARGETS := \ mt7622_bananapi_bpi-r64-sdmmc \ mt7622_linksys_e8450 \ mt7622_rfb1 \ + mt7622_ubnt_unifi-6-lr \ mt7623n_bpir2 \ mt7623a_unielec_u7623 \ mt7629_rfb diff --git a/package/boot/uboot-mediatek/patches/300-mt7622-generic-reset-button-ignore-env.patch b/package/boot/uboot-mediatek/patches/300-mt7622-generic-reset-button-ignore-env.patch index aeb4c49b9e..8b38248757 100644 --- a/package/boot/uboot-mediatek/patches/300-mt7622-generic-reset-button-ignore-env.patch +++ b/package/boot/uboot-mediatek/patches/300-mt7622-generic-reset-button-ignore-env.patch @@ -1,24 +1,23 @@ --- a/board/mediatek/mt7622/mt7622_rfb.c +++ b/board/mediatek/mt7622/mt7622_rfb.c -@@ -6,10 +6,17 @@ +@@ -6,9 +6,16 @@ #include <common.h> #include <config.h> +#include <dm.h> +#include <button.h> -+ #include <env.h> #include <init.h> #include <asm/global_data.h> - ++#include <linux/delay.h> ++ +#ifndef CONFIG_RESET_BUTTON_LABEL +#define CONFIG_RESET_BUTTON_LABEL "reset" +#endif -+ + DECLARE_GLOBAL_DATA_PTR; - int board_init(void) -@@ -20,7 +27,15 @@ int board_init(void) +@@ -20,7 +27,19 @@ int board_init(void) int board_late_init(void) { @@ -28,8 +27,12 @@ + + ret = !!button_get_by_label(CONFIG_RESET_BUTTON_LABEL, &dev); + -+ if (!ret) ++ if (!ret) { ++#ifdef CONFIG_RESET_BUTTON_SETTLE_DELAY ++ udelay(1000 * CONFIG_RESET_BUTTON_SETTLE_DELAY); ++#endif + ret = !button_get_state(dev); ++ } + + gd->env_valid = ret; //to load environment variable from persistent store env_relocate(); diff --git a/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch b/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch new file mode 100644 index 0000000000..2a42a6f1c1 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch @@ -0,0 +1,11 @@ +--- a/drivers/mtd/spi/spi-nor-ids.c ++++ b/drivers/mtd/spi/spi-nor-ids.c +@@ -329,6 +329,8 @@ const struct flash_info spi_nor_ids[] = + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, + { INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, ++ { INFO("w25q512jv", 0xef4020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ | ++ SPI_NOR_HAS_TB | SPI_NOR_HAS_LOCK) }, + { INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + #endif diff --git a/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch b/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch new file mode 100644 index 0000000000..17f0b29f84 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch @@ -0,0 +1,452 @@ +--- /dev/null ++++ b/configs/mt7622_ubnt_unifi-6-lr_defconfig +@@ -0,0 +1,138 @@ ++CONFIG_ARM=y ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_ARCH_MEDIATEK=y ++CONFIG_TARGET_MT7622=y ++CONFIG_SYS_TEXT_BASE=0x41e00000 ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_USE_DEFAULT_ENV_FILE=y ++CONFIG_ENV_IS_IN_MTD=y ++CONFIG_ENV_MTD_NAME="nor0" ++CONFIG_ENV_SIZE_REDUND=0x0 ++CONFIG_ENV_SIZE=0x1000 ++CONFIG_ENV_OFFSET=0xc0000 ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_RESET_BUTTON_SETTLE_DELAY=200 ++CONFIG_BOOTP_SEND_HOSTNAME=y ++CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr_env" ++CONFIG_DEBUG_UART_BASE=0x11002000 ++CONFIG_DEBUG_UART_CLOCK=25000000 ++CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr" ++CONFIG_DEBUG_UART=y ++CONFIG_SMBIOS_PRODUCT_NAME="" ++CONFIG_AUTOBOOT_KEYED=y ++CONFIG_BOOTDELAY=30 ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_CFB_CONSOLE_ANSI=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_GPIO_HOG=y ++CONFIG_CMD_ENV_FLAGS=y ++CONFIG_FIT=y ++CONFIG_FIT_ENABLE_SHA256_SUPPORT=y ++CONFIG_LOGLEVEL=7 ++CONFIG_LOG=y ++CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr" ++CONFIG_SYS_PROMPT="MT7622> " ++# CONFIG_LEGACY_IMAGE_FORMAT is not set ++# CONFIG_BOOTM_PLAN9 is not set ++# CONFIG_BOOTM_RTEMS is not set ++# CONFIG_BOOTM_VXWORKS is not set ++# CONFIG_EFI is not set ++# CONFIG_EFI_LOADER is not set ++CONFIG_CMD_BOOTMENU=y ++# CONFIG_CMD_BOOTEFI is not set ++CONFIG_CMD_BOOTP=y ++CONFIG_CMD_BUTTON=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_ECHO=y ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set ++CONFIG_CMD_ENV_READMEM=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_HASH=y ++CONFIG_CMD_ITEST=y ++CONFIG_CMD_LED=y ++CONFIG_CMD_LINK_LOCAL=y ++# CONFIG_CMD_MBR is not set ++CONFIG_CMD_MTD=y ++CONFIG_CMD_MTDPART=y ++# CONFIG_CMD_PCI is not set ++CONFIG_CMD_SF_TEST=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_SMC=y ++CONFIG_CMD_TFTPBOOT=y ++CONFIG_CMD_TFTPSRV=y ++# CONFIG_CMD_UNLZ4 is not set ++CONFIG_CMD_ASKENV=y ++# CONFIG_CMD_PSTORE is not set ++CONFIG_CMD_RARP=y ++CONFIG_CMD_SETEXPR=y ++CONFIG_CMD_SLEEP=y ++CONFIG_CMD_SOURCE=y ++CONFIG_CMD_UUID=y ++CONFIG_DISPLAY_CPUINFO=y ++CONFIG_DM_ETH=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_MDIO=y ++CONFIG_DM_MTD=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++# CONFIG_DM_MMC is not set ++CONFIG_DM_SERIAL=y ++CONFIG_DM_SPI=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_HUSH_PARSER=y ++# CONFIG_PARTITION_UUIDS is not set ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++# CONFIG_LED is not set ++# CONFIG_LZ4 is not set ++CONFIG_VERSION_VARIABLE=y ++CONFIG_NETCONSOLE=y ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_CLK=y ++CONFIG_PHY=y ++CONFIG_PHY_FIXED=y ++CONFIG_PHYLIB_10G=y ++CONFIG_PHY_AQUANTIA=y ++CONFIG_PHY_ADDR_ENABLE=y ++CONFIG_PHY_ADDR=8 ++CONFIG_MEDIATEK_ETH=y ++CONFIG_MTD=y ++# CONFIG_MMC is not set ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7622=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_PRE_CONSOLE_BUFFER=y ++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_RAM=y ++CONFIG_MTK_SERIAL=y ++CONFIG_SPI=y ++CONFIG_MTK_SNFI_SPI=y ++CONFIG_MTK_SNOR=y ++CONFIG_SYSRESET_WATCHDOG=y ++CONFIG_WDT_MTK=y ++CONFIG_HEXDUMP=y ++CONFIG_RANDOM_UUID=y ++CONFIG_REGEX=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_BAR=y ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_SPI_FLASH_UNLOCK_ALL=y ++CONFIG_SPI_FLASH_EON=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_SPANSION=y ++CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SPI_FLASH_SST=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_SPI_FLASH_XMC=y +--- /dev/null ++++ b/arch/arm/dts/mt7622-ubnt-unifi-6-lr.dts +@@ -0,0 +1,202 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2019 MediaTek Inc. ++ * Author: Sam Shih <sam.shih@mediatek.com> ++ */ ++ ++/dts-v1/; ++#include "mt7622.dtsi" ++#include "mt7622-u-boot.dtsi" ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ model = "mt7622-ubnt-unifi-6-lr"; ++ compatible = "mediatek,mt7622", "ubnt,unifi-6-lr"; ++ ++ chosen { ++ stdout-path = &uart0; ++ tick-timer = &timer0; ++ }; ++ ++ aliases { ++ spi0 = &snor; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ u-boot,dm-pre-reloc; ++ ++ reset { ++ label = "reset"; ++ gpios = <&gpio 62 GPIO_ACTIVE_LOW>; ++ u-boot,dm-pre-reloc; ++ }; ++ }; ++ ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x20000000>; ++ }; ++ ++ reg_1p8v: regulator-1p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-1.8V"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ reg_5v: regulator-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>; ++ status = "okay"; ++ ++ pcie@0,0 { ++ status = "okay"; ++ }; ++ ++ pcie@1,0 { ++ status = "okay"; ++ }; ++}; ++ ++&pinctrl { ++ eth_pins: eth-pins { ++ mux { ++ function = "eth"; ++ groups = "mdc_mdio", "rgmii_via_gmac2"; ++ }; ++ }; ++ ++ pcie0_pins: pcie0-pins { ++ mux { ++ function = "pcie"; ++ groups = "pcie0_pad_perst", ++ "pcie0_1_waken", ++ "pcie0_1_clkreq"; ++ }; ++ }; ++ ++ pcie1_pins: pcie1-pins { ++ mux { ++ function = "pcie"; ++ groups = "pcie1_pad_perst", ++ "pcie1_0_waken", ++ "pcie1_0_clkreq"; ++ }; ++ }; ++ ++ snfi_pins: snfi-pins { ++ mux { ++ function = "flash"; ++ groups = "snfi"; ++ }; ++ }; ++ ++ snor_pins: snor-pins { ++ mux { ++ function = "flash"; ++ groups = "spi_nor"; ++ }; ++ }; ++ ++ uart0_pins: uart0 { ++ mux { ++ function = "uart"; ++ groups = "uart0_0_tx_rx" ; ++ }; ++ }; ++ ++ watchdog_pins: watchdog-default { ++ mux { ++ function = "watchdog"; ++ groups = "watchdog"; ++ }; ++ }; ++}; ++ ++&snfi { ++ pinctrl-names = "default", "snfi"; ++ pinctrl-0 = <&snor_pins>; ++ pinctrl-1 = <&snfi_pins>; ++ status = "okay"; ++ ++ spi-flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ u-boot,dm-pre-reloc; ++ }; ++}; ++ ++&snor { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&snor_pins>; ++ status = "okay"; ++ ++ spi-flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-tx-bus-width = <1>; ++ spi-rx-bus-width = <4>; ++ u-boot,dm-pre-reloc; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ status = "okay"; ++}; ++ ++&watchdog { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&watchdog_pins>; ++ status = "okay"; ++}; ++ ++ð { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <ð_pins>; ++ ++ mediatek,gmac-id = <0>; ++ phy-mode = "sgmii"; ++ phy-handle = <&gphy>; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ ++ mdio-bus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ gphy: ethernet-phy@8 { ++ /* Marvell AQRate AQR112W - no driver */ ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ reg = <0x8>; ++ }; ++ }; ++}; +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -1008,6 +1008,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ + mt7623a-unielec-u7623-02-emmc.dtb \ + mt7622-bananapi-bpi-r64.dtb \ + mt7622-linksys-e8450-ubi.dtb \ ++ mt7622-ubnt-unifi-6-lr.dtb \ + mt7623n-bananapi-bpi-r2.dtb \ + mt7629-rfb.dtb \ + mt8512-bm1-emmc.dtb \ +--- /dev/null ++++ b/ubnt_unifi-6-lr_env +@@ -0,0 +1,51 @@ ++mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware) ++ethaddr_factory=mtd read nor0 $loadaddr 0x110000 0x10000 && env readmem -b ethaddr $loadaddr 0x6 ; setenv ethaddr_factory ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x40080000 ++bootcmd=run boot_nor ++bootdelay=0 ++bootfile=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-ubootmod-initramfs-recovery.itb ++bootfile_bl2=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-ubootmod-preloader.bin ++bootfile_fip=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-ubootmod-bl31-uboot.fip ++bootfile_upg=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-ubootmod-squashfs-sysupgrade.itb ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_default=0 ++bootmenu_delay=0 ++bootmenu_title= [0;34m( ( ( [1;39mOpenWrt[0;34m ) ) )[0m ++bootmenu_0=Initialize environment.=run _firstboot ++bootmenu_0d=Run default boot command.=run boot_default ++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return ++bootmenu_2=Boot production system from flash.=run boot_production ; run bootmenu_confirm_return ++bootmenu_3=Boot recovery system from flash.=run boot_recovery ; run bootmenu_confirm_return ++bootmenu_4=Load production system via TFTP then write to flash.=setenv noboot 1 ; run boot_tftp_production ; setenv noboot ; run bootmenu_confirm_return ++bootmenu_5=Load recovery system via TFTP then write to flash.=setenv noboot 1 ; run boot_tftp_recovery ; setenv noboot ; run bootmenu_confirm_return ++bootmenu_6=[31mLoad BL31+U-Boot FIP via TFTP then write to flash.[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return ++bootmenu_7=[31mLoad BL2 preloader via TFTP then write to flash.[0m=run boot_tftp_write_preloader ; run bootmenu_confirm_return ++bootmenu_8=Reboot.=reset ++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset ++boot_first=if button reset ; then run boot_tftp_forever ; fi ; bootmenu ++boot_default=run bootcmd ; run boot_recovery ; run boot_tftp_forever ++boot_production=run nor_read_production && bootm $loadaddr ++boot_production_or_recovery=run boot_production ; run boot_recovery ++boot_recovery=run nor_read_recovery ; bootm $loadaddr ++boot_serial_write_fip=loadx $loadaddr 115200 && run boot_write_fip ++boot_serial_write_preloader=loadx $loadaddr 115200 && run boot_write_preloader ++boot_tftp_forever=while true ; do run boot_tftp_recovery ; sleep 1 ; done ++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && iminfo $loadaddr && run nor_write_production ; if env exists noboot ; then else bootm $loadaddr ; fi ++boot_tftp_recovery=tftpboot $loadaddr $bootfile && iminfo $loadaddr && run nor_write_recovery ; if env exists noboot ; then else bootm $loadaddr ; fi ++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr ++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run boot_write_fip ++boot_tftp_write_preloader=tftpboot $loadaddr $bootfile_bl2 && run boot_write_preloader ++boot_nor=run boot_production_or_recovery ++boot_write_fip=mtd erase nor0 0x20000 0x80000 && mtd write nor0 $loadaddr 0x20000 0x80000 ++boot_write_preloader=mtd erase nor0 0x0 0x20000 && mtd write nor0 $loadaddr 0x0 0x20000 ++reset_factory=mtd erase nor0 0xc0000 0x10000 && reset ++nor_read_production=mtd read nor0 $loadaddr 0x1000000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x1000000 $image_size ++nor_read_recovery=mtd read nor0 $loadaddr 0x120000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x120000 $image_size ++nor_write_production=mtd write nor0 $loadaddr 0x1000000 $filesize ++nor_write_recovery=mtd write nor0 $loadaddr 0x120000 $filesize ++_init_env=setenv _init_env ; saveenv ++_firstboot=setenv _firstboot ; run _switch_to_menu ; run ethaddr_factory ; run _init_env ; run boot_first ++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title ++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title [33m$ver[0m" +--- a/common/board_r.c ++++ b/common/board_r.c +@@ -77,6 +77,7 @@ + #ifdef CONFIG_EFI_SETUP_EARLY + #include <efi_loader.h> + #endif ++#include <spi_flash.h> + + DECLARE_GLOBAL_DATA_PTR; + +@@ -410,6 +411,21 @@ static int initr_onenand(void) + } + #endif + ++#if defined(CONFIG_SPI_FLASH) ++/* probe SPI FLASH */ ++static int initr_spiflash(void) ++{ ++ struct udevice *new; ++ ++ spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, ++ CONFIG_SF_DEFAULT_CS, ++ CONFIG_SF_DEFAULT_SPEED, ++ CONFIG_SF_DEFAULT_MODE, ++ &new); ++ return 0; ++} ++#endif ++ + #ifdef CONFIG_MMC + static int initr_mmc(void) + { +@@ -697,6 +713,9 @@ static init_fnc_t init_sequence_r[] = { + #ifdef CONFIG_CMD_ONENAND + initr_onenand, + #endif ++#ifdef CONFIG_SPI_FLASH ++ initr_spiflash, ++#endif + #ifdef CONFIG_MMC + initr_mmc, + #endif |