aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--tools/firmware-utils/src/bcm4908img.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/tools/firmware-utils/src/bcm4908img.c b/tools/firmware-utils/src/bcm4908img.c
index ac76bd1c61..51c06041d6 100644
--- a/tools/firmware-utils/src/bcm4908img.c
+++ b/tools/firmware-utils/src/bcm4908img.c
@@ -54,6 +54,8 @@
#define WFI_FLAG_HAS_PMC 0x1
#define WFI_FLAG_SUPPORTS_BTRM 0x2
+#define UBI_EC_HDR_MAGIC 0x55424923
+
static int debug;
struct bcm4908img_tail {
@@ -79,6 +81,7 @@ struct bcm4908img_info {
size_t file_size;
size_t cferom_offset;
size_t bootfs_offset;
+ size_t rootfs_offset;
uint32_t crc32; /* Calculated checksum */
struct bcm4908img_tail tail;
};
@@ -298,6 +301,31 @@ static int bcm4908img_parse(FILE *fp, struct bcm4908img_info *info) {
return -EPROTO;
}
+ for (info->rootfs_offset = info->bootfs_offset;
+ info->rootfs_offset < info->file_size;
+ info->rootfs_offset += 0x20000) {
+ uint32_t magic;
+
+ if (fseek(fp, info->rootfs_offset, SEEK_SET)) {
+ err = -errno;
+ fprintf(stderr, "Failed to fseek: %d\n", err);
+ return err;
+ }
+
+ bytes = fread(&magic, 1, sizeof(magic), fp);
+ if (bytes != sizeof(magic)) {
+ fprintf(stderr, "Failed to read %zu bytes\n", sizeof(magic));
+ return -EIO;
+ }
+
+ if (be32_to_cpu(magic) == UBI_EC_HDR_MAGIC)
+ break;
+ }
+ if (info->rootfs_offset >= info->file_size) {
+ fprintf(stderr, "Failed to find rootfs offset\n");
+ return -EPROTO;
+ }
+
/* CRC32 */
/* Start with cferom (or bootfs) - skip vendor header */
@@ -366,6 +394,7 @@ static int bcm4908img_info(int argc, char **argv) {
if (info.bootfs_offset != info.cferom_offset)
printf("cferom offset:\t%zu\n", info.cferom_offset);
printf("bootfs offset:\t0x%zx\n", info.bootfs_offset);
+ printf("rootfs offset:\t0x%zx\n", info.rootfs_offset);
printf("Checksum:\t0x%08x\n", info.crc32);
err_close:
@@ -558,6 +587,12 @@ static int bcm4908img_extract(int argc, char **argv) {
fprintf(stderr, "This BCM4908 image doesn't contain cferom\n");
goto err_close;
}
+ } else if (!strcmp(type, "bootfs")) {
+ offset = info.bootfs_offset;
+ length = info.rootfs_offset - offset;
+ } else if (!strcmp(type, "rootfs")) {
+ offset = info.rootfs_offset;
+ length = info.file_size - offset - sizeof(struct bcm4908img_tail);
} else if (!strcmp(type, "firmware")) {
offset = info.bootfs_offset;
length = info.file_size - offset - sizeof(struct bcm4908img_tail);
'#n137'>137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394
/*
 * Device Tree Source for Meraki MR33 (Stinkbug)
 *
 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
 * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
 *
 * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

#include "qcom-ipq4019.dtsi"
#include "qcom-ipq4019-bus.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>

/ {
	model = "Meraki MR33 Access Point";
	compatible = "meraki,mr33", "qcom,ipq4019";

	aliases {
		led-boot = &status_green;
		led-failsafe = &status_red;
		led-running = &status_green;
		led-upgrade = &power_orange;
	};

	/* Do we really need this defined? */
	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>;
	};

	soc {
		mdio@90000 {
			status = "okay";
			pinctrl-0 = <&mdio_pins>;
			pinctrl-names = "default";
			/delete-node/ ethernet-phy@0;
			/delete-node/ ethernet-phy@2;
			/delete-node/ ethernet-phy@3;
			/delete-node/ ethernet-phy@4;
		};

		/* It is a 56-bit counter that supplies the count to the ARM arch
		   timers and without upstream driver */
		counter@4a1000 {
			compatible = "qcom,qca-gcnt";
			reg = <0x4a1000 0x4>;
		};

		ess_tcsr@1953000 {
			compatible = "qcom,tcsr";
			reg = <0x1953000 0x1000>;
			qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
		};

		tcsr@1949000 {
			compatible = "qcom,tcsr";
			reg = <0x1949000 0x100>;
			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
		};

		tcsr@1957000 {
			compatible = "qcom,tcsr";
			reg = <0x1957000 0x100>;
			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
		};

		serial@78af000 {
			pinctrl-0 = <&serial_0_pins>;
			pinctrl-names = "default";
			status = "okay";
		};

		serial@78b0000 {
			pinctrl-0 = <&serial_1_pins>;
			pinctrl-names = "default";
			status = "okay";

			bluetooth {
				compatible = "ti,cc2650";
				enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
			};
		};

		crypto@8e3a000 {
			status = "okay";
		};

		watchdog@b017000 {
			status = "okay";
		};

		ess-switch@c000000 {
			switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
			switch_lan_bmp = <0x0>; /* lan port bitmap */
			switch_wan_bmp = <0x10>; /* wan port bitmap */
		};

		edma@c080000 {
			qcom,single-phy;
			qcom,num_gmac = <1>;
			phy-mode = "rgmii-rxid";
			status = "okay";
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		power_orange: power {
			label = "mr33:orange:power";
			gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
			panic-indicator;
		};
	};
};

&blsp_dma {
	status = "okay";
};

&cryptobam {
	status = "okay";
};

&gmac0 {
	qcom,phy_mdio_addr = <1>;
	qcom,poll_required = <1>;
	vlan_tag = <0 0x20>;
};

&i2c_0 {
	pinctrl-0 = <&i2c_0_pins>;
	pinctrl-names = "default";
	status = "okay";
	at24@50 {
		compatible = "atmel,24c64";
		pagesize = <32>;
		reg = <0x50>;
		read-only; /* This holds our MAC & Meraki board-data */
	};
};

&i2c_1 {
	pinctrl-0 = <&i2c_1_pins>;
	pinctrl-names = "default";
	status = "okay";

	lp5562@30 {
		enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
		compatible = "ti,lp5562";
		clock-mode = /bits/8 <2>;
		reg = <0x30>;

		/* RGB led */
		status_red: chan0 {
			chan-name = "mr33:red:status";
			led-cur = /bits/ 8 <0x20>;
			max-cur = /bits/ 8 <0x60>;
		};

		status_green: chan1 {
			chan-name = "mr33:green:status";
			led-cur = /bits/ 8 <0x20>;
			max-cur = /bits/ 8 <0x60>;
		};

		chan2 {
			chan-name = "mr33:blue:status";
			led-cur = /bits/ 8 <0x20>;
			max-cur = /bits/ 8 <0x60>;
		};

		chan3 {
			chan-name = "mr33:white:status";
			led-cur = /bits/ 8 <0x20>;
			max-cur = /bits/ 8 <0x60>;
		};
	};
};

&nand {
	pinctrl-0 = <&nand_pins>;
	pinctrl-names = "default";
	status = "okay";

	nand@0 {
		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "sbl1";
				reg = <0x000000000000 0x000000100000>;
				read-only;
			};
			partition@1 {
				label = "mibib";
				reg = <0x000000100000 0x000000100000>;
				read-only;
			};
			partition@2 {
				label = "bootconfig";
				reg = <0x000000200000 0x000000100000>;
				read-only;
			};
			partition@3 {
				label = "qsee";
				reg = <0x000000300000 0x000000100000>;
				read-only;
			};
			partition@4 {
				label = "qsee_alt";
				reg = <0x000000400000 0x000000100000>;
				read-only;
			};
			partition@5 {
				label = "cdt";
				reg = <0x000000500000 0x000000080000>;
				read-only;
			};
			partition@6 {
				label = "cdt_alt";
				reg = <0x000000580000 0x000000080000>;
				read-only;
			};
			partition@7 {
				label = "ddrparams";
				reg = <0x000000600000 0x000000080000>;
				read-only;
			};
			partition@8 {
				label = "u-boot";
				reg = <0x000000700000 0x000000200000>;
				read-only;
			};
			partition@9 {
				label = "u-boot-backup";
				reg = <0x000000900000 0x000000200000>;
				read-only;
			};
			partition@10 {
				label = "ART";
				reg = <0x000000b00000 0x000000080000>;
				read-only;
			};
			partition@11 {
				label = "ubi";
				reg = <0x000000c00000 0x000007000000>;
			};
		};
	};
};

&pcie0 {
	status = "okay";
	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;