diff options
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/irq.c | 49 |
1 files changed, 12 insertions, 37 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c index 25d643d035..d5d9a6806a 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c @@ -1,7 +1,7 @@ /* * Atheros AR71xx SoC specific interrupt handling * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> + * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> * * Parts of this file are based on Atheros' 2.6.15 BSP @@ -21,10 +21,8 @@ #include <asm/mach-ar71xx/ar71xx.h> -static void (* ar71xx_ip2_irq_handler)(void) = spurious_interrupt; - #ifdef CONFIG_PCI -static void ar71xx_pci_irq_dispatch(void) +static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc) { u32 pending; @@ -32,16 +30,16 @@ static void ar71xx_pci_irq_dispatch(void) ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE); if (pending & PCI_INT_DEV0) - do_IRQ(AR71XX_PCI_IRQ_DEV0); + generic_handle_irq(AR71XX_PCI_IRQ_DEV0); else if (pending & PCI_INT_DEV1) - do_IRQ(AR71XX_PCI_IRQ_DEV1); + generic_handle_irq(AR71XX_PCI_IRQ_DEV1); else if (pending & PCI_INT_DEV2) - do_IRQ(AR71XX_PCI_IRQ_DEV2); + generic_handle_irq(AR71XX_PCI_IRQ_DEV2); else if (pending & PCI_INT_CORE) - do_IRQ(AR71XX_PCI_IRQ_CORE); + generic_handle_irq(AR71XX_PCI_IRQ_CORE); else spurious_interrupt(); @@ -74,17 +72,10 @@ static struct irq_chip ar71xx_pci_irq_chip = { .mask_ack = ar71xx_pci_irq_mask, }; -static struct irqaction ar71xx_pci_irqaction = { - .handler = no_action, - .name = "cascade [AR71XX PCI]", -}; - static void __init ar71xx_pci_irq_init(void) { int i; - ar71xx_ip2_irq_handler = ar71xx_pci_irq_dispatch; - ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_ENABLE, 0); ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_STATUS, 0); @@ -95,10 +86,10 @@ static void __init ar71xx_pci_irq_init(void) handle_level_irq); } - setup_irq(AR71XX_CPU_IRQ_IP2, &ar71xx_pci_irqaction); + set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler); } -static void ar724x_pci_irq_dispatch(void) +static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc) { u32 pending; @@ -106,7 +97,7 @@ static void ar724x_pci_irq_dispatch(void) ar724x_pci_rr(AR724X_PCI_REG_INT_MASK); if (pending & AR724X_PCI_INT_DEV0) - do_IRQ(AR71XX_PCI_IRQ_DEV0); + generic_handle_irq(AR71XX_PCI_IRQ_DEV0); else spurious_interrupt(); @@ -151,11 +142,6 @@ static struct irq_chip ar724x_pci_irq_chip = { .mask_ack = ar724x_pci_irq_mask, }; -static struct irqaction ar724x_pci_irqaction = { - .handler = no_action, - .name = "cascade [AR724X PCI]", -}; - static void __init ar724x_pci_irq_init(void) { u32 t; @@ -167,8 +153,6 @@ static void __init ar724x_pci_irq_init(void) return; } - ar71xx_ip2_irq_handler = ar724x_pci_irq_dispatch; - ar724x_pci_wr(AR724X_PCI_REG_INT_MASK, 0); ar724x_pci_wr(AR724X_PCI_REG_INT_STATUS, 0); @@ -179,7 +163,7 @@ static void __init ar724x_pci_irq_init(void) handle_level_irq); } - setup_irq(AR71XX_CPU_IRQ_IP2, &ar724x_pci_irqaction); + set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar724x_pci_irq_handler); } #else static inline void ar71xx_pci_irq_init(void) {}; @@ -366,11 +350,6 @@ static void __init ar71xx_misc_irq_init(void) setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction); } -static void ar913x_wmac_irq_dispatch(void) -{ - do_IRQ(AR71XX_CPU_IRQ_IP2); -} - asmlinkage void plat_irq_dispatch(void) { unsigned long pending; @@ -381,7 +360,7 @@ asmlinkage void plat_irq_dispatch(void) do_IRQ(AR71XX_CPU_IRQ_TIMER); else if (pending & STATUSF_IP2) - ar71xx_ip2_irq_handler(); + do_IRQ(AR71XX_CPU_IRQ_IP2); else if (pending & STATUSF_IP4) do_IRQ(AR71XX_CPU_IRQ_GE0); @@ -416,12 +395,8 @@ void __init arch_init_irq(void) case AR71XX_SOC_AR7240: ar724x_pci_irq_init(); break; - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - ar71xx_ip2_irq_handler = ar913x_wmac_irq_dispatch; - break; default: - BUG(); + break; } ar71xx_gpio_irq_init(); |