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authorFelix Fietkau <nbd@nbd.name>2018-03-12 10:28:03 +0100
committerFelix Fietkau <nbd@nbd.name>2018-03-12 12:19:07 +0100
commit16cec7ae67d9a1e88cb30b45f45596ba753b2afa (patch)
treed87f443c4d8a965b9b72f127d13ec12d78d88e56 /toolchain
parentfe98f2679c2e73245c06a4b6a404abba4a915930 (diff)
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toolchain/gcc: merge pending fix for miscompiled MIPS16 code issue (GCC PR 84790)
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'toolchain')
-rw-r--r--toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch20
-rw-r--r--toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch2
-rw-r--r--toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch2
3 files changed, 22 insertions, 2 deletions
diff --git a/toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch
new file mode 100644
index 0000000000..643c5e68a8
--- /dev/null
+++ b/toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch
@@ -0,0 +1,20 @@
+Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
+MIPS16 functions have a static assembler prologue which clobbers
+registers v0 and v1. Add these register clobbers to function call
+instructions.
+
+--- a/gcc/config/mips/mips.c
++++ b/gcc/config/mips/mips.c
+@@ -3098,6 +3098,12 @@ mips_emit_call_insn (rtx pattern, rtx or
+ emit_insn (gen_update_got_version ());
+ }
+
++ if (TARGET_MIPS16 && TARGET_USE_GOT)
++ {
++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
++ }
++
+ if (TARGET_MIPS16
+ && TARGET_EXPLICIT_RELOCS
+ && TARGET_CALL_CLOBBERED_GP)
diff --git a/toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch
index 84c0fdab66..2d0ae46138 100644
--- a/toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch
+++ b/toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch
@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
-@@ -19784,7 +19784,7 @@ mips_option_override (void)
+@@ -19790,7 +19790,7 @@ mips_option_override (void)
flag_pcc_struct_return = 0;
/* Decide which rtx_costs structure to use. */
diff --git a/toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch b/toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch
index 90d10f11e4..5affd6f92d 100644
--- a/toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch
+++ b/toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch
@@ -48,7 +48,7 @@ sellcey@mips.com
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
-@@ -22561,6 +22561,9 @@ mips_promote_function_mode (const_tree t
+@@ -22567,6 +22567,9 @@ mips_promote_function_mode (const_tree t
#undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS
#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2