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authorImre Kaloz <kaloz@openwrt.org>2011-02-02 20:19:28 +0000
committerImre Kaloz <kaloz@openwrt.org>2011-02-02 20:19:28 +0000
commit247e9192231dcf9db2c88173b1e76cb18abf9db5 (patch)
tree659ca5c6baee7ffe9f26531f1b4c77cf07e245e3 /toolchain/uClibc/patches-0.9.32
parentfa5259d44296a784c67d88197dc75d8ae860138a (diff)
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autodetect ARM variant/ABI setup based on the compiler settings
SVN-Revision: 25328
Diffstat (limited to 'toolchain/uClibc/patches-0.9.32')
-rw-r--r--toolchain/uClibc/patches-0.9.32/900-reorder_use_bx.patch46
-rw-r--r--toolchain/uClibc/patches-0.9.32/910-thumb_blind_options.patch146
-rw-r--r--toolchain/uClibc/patches-0.9.32/920-remove_sub-arch_variants.patch189
-rw-r--r--toolchain/uClibc/patches-0.9.32/930-transform_eabi_oabi_choice.patch49
-rw-r--r--toolchain/uClibc/patches-0.9.32/940-include_arm-asm.h.patch39
-rw-r--r--toolchain/uClibc/patches-0.9.32/950-detect_bx_availibility.patch49
-rw-r--r--toolchain/uClibc/patches-0.9.32/960-remove_eabi_oabi_selection.patch90
7 files changed, 608 insertions, 0 deletions
diff --git a/toolchain/uClibc/patches-0.9.32/900-reorder_use_bx.patch b/toolchain/uClibc/patches-0.9.32/900-reorder_use_bx.patch
new file mode 100644
index 0000000000..dddd0a0e4f
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.32/900-reorder_use_bx.patch
@@ -0,0 +1,46 @@
+"Use BX" is not available on all CPUs, so the option depends on
+a correct CPU to be chosen . It is weird that e BX" then appears
+_above_ the CPU selection, not below.
+
+Move the "Use BX" after the CPU selection.
+
+Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
+Cc: Khem Raj <raj.khem@gmail.com>
+Cc: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
+Cc: Carmelo AMOROSO <carmelo.amoroso@st.com>
+---
+ extra/Configs/Config.arm | 14 +++++++-------
+ 1 files changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/extra/Configs/Config.arm b/extra/Configs/Config.arm
+index b060ace..3b90e67 100644
+--- a/extra/Configs/Config.arm
++++ b/extra/Configs/Config.arm
+@@ -30,13 +30,6 @@ config CONFIG_ARM_EABI
+
+ endchoice
+
+-config USE_BX
+- bool "Use BX in function return"
+- default y
+- depends on !CONFIG_GENERIC_ARM && !CONFIG_ARM610 && !CONFIG_ARM710
+- help
+- Use BX instruction for THUMB aware architectures.
+-
+ choice
+ prompt "Target Processor Type"
+ default CONFIG_GENERIC_ARM
+@@ -131,3 +124,10 @@ config CONFIG_ARM_IWMMXT
+ select ARCH_HAS_MMU
+
+ endchoice
++
++config USE_BX
++ bool "Use BX in function return"
++ default y
++ depends on !CONFIG_GENERIC_ARM && !CONFIG_ARM610 && !CONFIG_ARM710
++ help
++ Use BX instruction for THUMB aware architectures.
+--
+1.7.1
+
diff --git a/toolchain/uClibc/patches-0.9.32/910-thumb_blind_options.patch b/toolchain/uClibc/patches-0.9.32/910-thumb_blind_options.patch
new file mode 100644
index 0000000000..7585533ff2
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.32/910-thumb_blind_options.patch
@@ -0,0 +1,146 @@
+Add three new blind options to set use of Thumb mode:
+- COMPILE_IN_THUMB_MODE
+ - if set, CFLAGS will contain -mthumb
+ - if unset, the compiler's default is used
+- HAS_THUMB
+ - CPUS with Thumb instruction set can select this
+ - use of BX depends on this
+- FORCE_THUMB
+ - CPUs that are Thumb-only must select this
+ - this selects: HAS_THUMB, COMPILE_IN_THUMB_MODE and USE_BX
+
+Also, remove leading space in Rules.mak.
+
+Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
+Cc: Khem Raj <raj.khem@gmail.com>
+Cc: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
+Cc: Carmelo AMOROSO <carmelo.amoroso@st.com>
+---
+ Rules.mak | 7 ++++---
+ extra/Configs/Config.arm | 31 ++++++++++++++++++++++++++++---
+ 2 files changed, 32 insertions(+), 6 deletions(-)
+
+diff --git a/Rules.mak b/Rules.mak
+index eecdc64..2a16908 100644
+--- a/Rules.mak
++++ b/Rules.mak
+@@ -348,9 +348,10 @@ ifeq ($(TARGET_ARCH),arm)
+ CPU_CFLAGS-$(CONFIG_ARM_SA1100)+=-mtune=strongarm1100 -march=armv4
+ CPU_CFLAGS-$(CONFIG_ARM_XSCALE)+=$(call check_gcc,-mtune=xscale,-mtune=strongarm110)
+ CPU_CFLAGS-$(CONFIG_ARM_XSCALE)+=-march=armv5te -Wa,-mcpu=xscale
+- CPU_CFLAGS-$(CONFIG_ARM_IWMMXT)+=-march=iwmmxt -Wa,-mcpu=iwmmxt -mabi=iwmmxt
+- CPU_CFLAGS-$(CONFIG_ARM_CORTEX_M3)+=-mcpu=cortex-m3 -mthumb
+- CPU_CFLAGS-$(CONFIG_ARM_CORTEX_M1)+=-mcpu=cortex-m1 -mthumb
++ CPU_CFLAGS-$(CONFIG_ARM_IWMMXT)+=-march=iwmmxt -Wa,-mcpu=iwmmxt -mabi=iwmmxt
++ CPU_CFLAGS-$(CONFIG_ARM_CORTEX_M3)+=-mcpu=cortex-m3
++ CPU_CFLAGS-$(CONFIG_ARM_CORTEX_M1)+=-mcpu=cortex-m1
++ CPU_CFLAGS-$(COMPILE_IN_THUMB_MODE)+=-mthumb
+ endif
+
+ ifeq ($(TARGET_ARCH),mips)
+diff --git a/extra/Configs/Config.arm b/extra/Configs/Config.arm
+index 3b90e67..c9c40d4 100644
+--- a/extra/Configs/Config.arm
++++ b/extra/Configs/Config.arm
+@@ -64,70 +64,95 @@ config CONFIG_ARM710
+ config CONFIG_ARM7TDMI
+ bool "Arm 7TDMI"
+ select ARCH_HAS_NO_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM720T
+ bool "Arm 720T"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM920T
+ bool "Arm 920T"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM922T
+ bool "Arm 922T"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM926T
+ bool "Arm 926T"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM10T
+ bool "Arm 10T"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM1136JF_S
+ bool "Arm 1136JF-S"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM1176JZ_S
+ bool "Arm 1176JZ-S"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM1176JZF_S
+ bool "Arm 1176JZF-S"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM_CORTEX_M3
+ bool "Arm Cortex-M3"
+ select ARCH_HAS_NO_MMU
+- select USE_BX
++ select FORCE_THUMB
+
+ config CONFIG_ARM_CORTEX_M1
+ bool "Arm Cortex-M1"
+ select ARCH_HAS_NO_MMU
+- select USE_BX
++ select FORCE_THUMB
+
+ config CONFIG_ARM_SA110
+ bool "Intel StrongArm SA-110"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM_SA1100
+ bool "Intel StrongArm SA-1100"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM_XSCALE
+ bool "Intel Xscale"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ config CONFIG_ARM_IWMMXT
+ bool "Intel Xscale With WMMX PXA27x"
+ select ARCH_HAS_MMU
++ select HAS_THUMB
+
+ endchoice
+
++config HAS_THUMB
++ bool
++
++config FORCE_THUMB
++ bool
++ select HAS_THUMB
++ select COMPILE_IN_THUMB_MODE
++ select USE_BX
++
++config COMPILE_IN_THUMB_MODE
++ bool
++
+ config USE_BX
+ bool "Use BX in function return"
+ default y
+- depends on !CONFIG_GENERIC_ARM && !CONFIG_ARM610 && !CONFIG_ARM710
++ depends on HAS_THUMB
+ help
+ Use BX instruction for THUMB aware architectures.
+--
+1.7.1
+
diff --git a/toolchain/uClibc/patches-0.9.32/920-remove_sub-arch_variants.patch b/toolchain/uClibc/patches-0.9.32/920-remove_sub-arch_variants.patch
new file mode 100644
index 0000000000..4051ef39fc
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.32/920-remove_sub-arch_variants.patch
@@ -0,0 +1,189 @@
+Rely on the compiler to be correctly set up to generate
+appropriate code for the target variant.
+
+This exposes the Thumb option, as it is no longer auto-selected.
+The "Use BX" no longer depends on supported CPU to be selected,
+so it now defaults to 'n' as it shall work by default on CPUs
+that do not have BX.
+
+Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
+Cc: Khem Raj <raj.khem@gmail.com>
+Cc: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
+Cc: Carmelo AMOROSO <carmelo.amoroso@st.com>
+---
+ Rules.mak | 19 -------
+ extra/Configs/Config.arm | 125 ++--------------------------------------------
+ 2 files changed, 5 insertions(+), 139 deletions(-)
+
+diff --git a/Rules.mak b/Rules.mak
+index 2a16908..09741a6 100644
+--- a/Rules.mak
++++ b/Rules.mak
+@@ -332,25 +332,6 @@ ifeq ($(TARGET_ARCH),arm)
+ OPTIMIZATION+=-fstrict-aliasing
+ CPU_CFLAGS-$(ARCH_LITTLE_ENDIAN)+=-mlittle-endian
+ CPU_CFLAGS-$(ARCH_BIG_ENDIAN)+=-mbig-endian
+- CPU_CFLAGS-$(CONFIG_GENERIC_ARM)+=
+- CPU_CFLAGS-$(CONFIG_ARM610)+=-mtune=arm610 -march=armv3
+- CPU_CFLAGS-$(CONFIG_ARM710)+=-mtune=arm710 -march=armv3
+- CPU_CFLAGS-$(CONFIG_ARM7TDMI)+=-mtune=arm7tdmi -march=armv4t
+- CPU_CFLAGS-$(CONFIG_ARM720T)+=-mtune=arm7tdmi -march=armv4t
+- CPU_CFLAGS-$(CONFIG_ARM920T)+=-mtune=arm9tdmi -march=armv4t
+- CPU_CFLAGS-$(CONFIG_ARM922T)+=-mtune=arm9tdmi -march=armv4t
+- CPU_CFLAGS-$(CONFIG_ARM926T)+=-mtune=arm9e -march=armv5te
+- CPU_CFLAGS-$(CONFIG_ARM10T)+=-mtune=arm10tdmi -march=armv5t
+- CPU_CFLAGS-$(CONFIG_ARM1136JF_S)+=-mtune=arm1136jf-s -march=armv6
+- CPU_CFLAGS-$(CONFIG_ARM1176JZ_S)+=-mtune=arm1176jz-s -march=armv6
+- CPU_CFLAGS-$(CONFIG_ARM1176JZF_S)+=-mtune=arm1176jzf-s -march=armv6
+- CPU_CFLAGS-$(CONFIG_ARM_SA110)+=-mtune=strongarm110 -march=armv4
+- CPU_CFLAGS-$(CONFIG_ARM_SA1100)+=-mtune=strongarm1100 -march=armv4
+- CPU_CFLAGS-$(CONFIG_ARM_XSCALE)+=$(call check_gcc,-mtune=xscale,-mtune=strongarm110)
+- CPU_CFLAGS-$(CONFIG_ARM_XSCALE)+=-march=armv5te -Wa,-mcpu=xscale
+- CPU_CFLAGS-$(CONFIG_ARM_IWMMXT)+=-march=iwmmxt -Wa,-mcpu=iwmmxt -mabi=iwmmxt
+- CPU_CFLAGS-$(CONFIG_ARM_CORTEX_M3)+=-mcpu=cortex-m3
+- CPU_CFLAGS-$(CONFIG_ARM_CORTEX_M1)+=-mcpu=cortex-m1
+ CPU_CFLAGS-$(COMPILE_IN_THUMB_MODE)+=-mthumb
+ endif
+
+diff --git a/extra/Configs/Config.arm b/extra/Configs/Config.arm
+index c9c40d4..6c75a00 100644
+--- a/extra/Configs/Config.arm
++++ b/extra/Configs/Config.arm
+@@ -30,129 +30,14 @@ config CONFIG_ARM_EABI
+
+ endchoice
+
+-choice
+- prompt "Target Processor Type"
+- default CONFIG_GENERIC_ARM
+- help
+- This is the processor type of your CPU. This information is used for
+- optimizing purposes. To build a library that will run on all ARMCPU
+- types (albeit not optimally fast), you can specify "Generic Arm" here.
+- If you pick anything other than "Generic Arm", there is no guarantee
+- that uClibc will even run on anything other than the selected
+- processor type.
+-
+- Here are the settings recommended for greatest speed:
+- - "Generic Arm" select this if your compiler is already setup to
+- optimize things properly, or if you want to run on pretty much
+- everything, or you just don't much care.
+- - For anything else, pick the ARM core type that best matches the
+- cpu you will be using on your device.
+-
+- If you don't know what to do, choose "Generic Arm".
+-
+-config CONFIG_GENERIC_ARM
+- bool "Generic Arm"
+-
+-config CONFIG_ARM610
+- bool "Arm 610"
+- select ARCH_HAS_MMU
+-
+-config CONFIG_ARM710
+- bool "Arm 710"
+- select ARCH_HAS_MMU
+-
+-config CONFIG_ARM7TDMI
+- bool "Arm 7TDMI"
+- select ARCH_HAS_NO_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM720T
+- bool "Arm 720T"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM920T
+- bool "Arm 920T"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM922T
+- bool "Arm 922T"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM926T
+- bool "Arm 926T"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM10T
+- bool "Arm 10T"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM1136JF_S
+- bool "Arm 1136JF-S"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM1176JZ_S
+- bool "Arm 1176JZ-S"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM1176JZF_S
+- bool "Arm 1176JZF-S"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM_CORTEX_M3
+- bool "Arm Cortex-M3"
+- select ARCH_HAS_NO_MMU
+- select FORCE_THUMB
+-
+-config CONFIG_ARM_CORTEX_M1
+- bool "Arm Cortex-M1"
+- select ARCH_HAS_NO_MMU
+- select FORCE_THUMB
+-
+-config CONFIG_ARM_SA110
+- bool "Intel StrongArm SA-110"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM_SA1100
+- bool "Intel StrongArm SA-1100"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM_XSCALE
+- bool "Intel Xscale"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-config CONFIG_ARM_IWMMXT
+- bool "Intel Xscale With WMMX PXA27x"
+- select ARCH_HAS_MMU
+- select HAS_THUMB
+-
+-endchoice
+-
+-config HAS_THUMB
+- bool
+-
+-config FORCE_THUMB
+- bool
+- select HAS_THUMB
+- select COMPILE_IN_THUMB_MODE
+- select USE_BX
+-
+ config COMPILE_IN_THUMB_MODE
+- bool
++ bool "Build using Thumb mode"
++ select USE_BX
++ help
++ Say 'y' here to force building uClibc in thumb mode.
++ Say 'n' to use your compiler's default mode.
+
+ config USE_BX
+ bool "Use BX in function return"
+- default y
+- depends on HAS_THUMB
+ help
+ Use BX instruction for THUMB aware architectures.
+--
+1.7.1
+
diff --git a/toolchain/uClibc/patches-0.9.32/930-transform_eabi_oabi_choice.patch b/toolchain/uClibc/patches-0.9.32/930-transform_eabi_oabi_choice.patch
new file mode 100644
index 0000000000..7a91f6786c
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.32/930-transform_eabi_oabi_choice.patch
@@ -0,0 +1,49 @@
+The CONFIG_ARM_OABI option is never used.
+
+Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
+Cc: Khem Raj <raj.khem@gmail.com>
+Cc: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
+Cc: Carmelo AMOROSO <carmelo.amoroso@st.com>
+---
+ extra/Configs/Config.arm | 23 ++++++++---------------
+ 1 files changed, 8 insertions(+), 15 deletions(-)
+
+diff --git a/extra/Configs/Config.arm b/extra/Configs/Config.arm
+index 6c75a00..227b90c 100644
+--- a/extra/Configs/Config.arm
++++ b/extra/Configs/Config.arm
+@@ -12,23 +12,16 @@ config FORCE_OPTIONS_FOR_ARCH
+ default y
+ select ARCH_ANY_ENDIAN
+
+-choice
+- prompt "Target ABI"
+- default CONFIG_ARM_OABI
++config CONFIG_ARM_EABI
++ bool "Build for EABI"
+ help
+- If you choose "EABI" here, functions and constants required by the
+- ARM EABI will be built into the library. You should choose "EABI"
++ If you say 'y' here, functions and constants required by the
++ ARM EABI will be built into the library. You should say 'y'
+ if your compiler uses the ARM EABI, in which case you will also
+- need a kernel supporting the EABI system call interface, or "OABI"
+- for a compiler using the old Linux ABI.
+-
+-config CONFIG_ARM_OABI
+- bool "OABI"
+-
+-config CONFIG_ARM_EABI
+- bool "EABI"
+-
+-endchoice
++ need a kernel supporting the EABI system call interface.
++
++ If you say 'n' here, then the library will be built for the
++ old Linux ABI.
+
+ config COMPILE_IN_THUMB_MODE
+ bool "Build using Thumb mode"
+--
+1.7.1
+
diff --git a/toolchain/uClibc/patches-0.9.32/940-include_arm-asm.h.patch b/toolchain/uClibc/patches-0.9.32/940-include_arm-asm.h.patch
new file mode 100644
index 0000000000..955b372ad8
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.32/940-include_arm-asm.h.patch
@@ -0,0 +1,39 @@
+The check for __USE_BX__ will be available in bits/arm_asm.h,
+so the latter must be included wherever the former is used.
+
+Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
+Cc: Khem Raj <raj.khem@gmail.com>
+Cc: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
+Cc: Carmelo AMOROSO <carmelo.amoroso@st.com>
+---
+ ldso/ldso/arm/dl-startup.h | 1 +
+ libc/sysdeps/linux/arm/sysdep.h | 1 +
+ 2 files changed, 2 insertions(+), 0 deletions(-)
+
+diff --git a/ldso/ldso/arm/dl-startup.h b/ldso/ldso/arm/dl-startup.h
+index a95389d..2dfdaff 100644
+--- a/ldso/ldso/arm/dl-startup.h
++++ b/ldso/ldso/arm/dl-startup.h
+@@ -7,6 +7,7 @@
+ */
+
+ #include <features.h>
++#include <bits/arm_asm.h>
+
+ #if !defined(__thumb__)
+ __asm__(
+diff --git a/libc/sysdeps/linux/arm/sysdep.h b/libc/sysdeps/linux/arm/sysdep.h
+index 013f88c..e498695 100644
+--- a/libc/sysdeps/linux/arm/sysdep.h
++++ b/libc/sysdeps/linux/arm/sysdep.h
+@@ -21,6 +21,7 @@
+ #define _LINUX_ARM_SYSDEP_H 1
+
+ #include <common/sysdep.h>
++#include <bits/arm_asm.h>
+
+ #include <sys/syscall.h>
+ /* For Linux we can use the system call table in the header file
+--
+1.7.1
+
diff --git a/toolchain/uClibc/patches-0.9.32/950-detect_bx_availibility.patch b/toolchain/uClibc/patches-0.9.32/950-detect_bx_availibility.patch
new file mode 100644
index 0000000000..24d5bcca66
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.32/950-detect_bx_availibility.patch
@@ -0,0 +1,49 @@
+The "use BX" option is now a suggestion that BX be used if available.
+Use a macro to detect if BX is available at build time. If so, and
+the user requested it be used, then use it. Otherwise, error out.
+
+Macro courtesy Khem RAJ:
+ http://lists.uclibc.org/pipermail/uclibc/2009-April/042301.html
+
+Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
+Cc: Khem Raj <raj.khem@gmail.com>
+Cc: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
+Cc: Carmelo AMOROSO <carmelo.amoroso@st.com>
+---
+ extra/Configs/Config.arm | 4 +++-
+ libc/sysdeps/linux/arm/bits/arm_asm.h | 9 ++++++++-
+ 2 files changed, 11 insertions(+), 2 deletions(-)
+
+diff --git a/extra/Configs/Config.arm b/extra/Configs/Config.arm
+index 227b90c..9aa9e56 100644
+--- a/extra/Configs/Config.arm
++++ b/extra/Configs/Config.arm
+@@ -33,4 +33,6 @@ config COMPILE_IN_THUMB_MODE
+ config USE_BX
+ bool "Use BX in function return"
+ help
+- Use BX instruction for THUMB aware architectures.
++ Say 'y' to use BX to return from functions on your thumb-aware
++ processor. Say 'y' if you need to use interworking. Say 'n' if not.
++ It is safe to say 'y' even if you're not doing interworking.
+diff --git a/libc/sysdeps/linux/arm/bits/arm_asm.h b/libc/sysdeps/linux/arm/bits/arm_asm.h
+index 1d87df6..921c9a3 100644
+--- a/libc/sysdeps/linux/arm/bits/arm_asm.h
++++ b/libc/sysdeps/linux/arm/bits/arm_asm.h
+@@ -24,5 +24,12 @@
+ #define THUMB1_ONLY 1
+ #endif
+
+-#endif /* _ARM_ASM_H */
++#if defined(__USE_BX__)
++# if ( defined (__ARM_ARCH_2__) || defined (__ARM_ARCH_3__) \
++ || defined (__ARM_ARCH_3M__) || defined (__ARM_ARCH_4__) \
++ )
++# error Use of BX was requested, but is not available on the target processor.
++# endif /* ARCH level */
++#endif /* __USE_BX__ */
+
++#endif /* _ARM_ASM_H */
+--
+1.7.1
+
diff --git a/toolchain/uClibc/patches-0.9.32/960-remove_eabi_oabi_selection.patch b/toolchain/uClibc/patches-0.9.32/960-remove_eabi_oabi_selection.patch
new file mode 100644
index 0000000000..a87d8c99f1
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.32/960-remove_eabi_oabi_selection.patch
@@ -0,0 +1,90 @@
+Rely on the compiler to be properly setup for the default ABI.
+
+When installing-headers, there are two cases:
+- NPTL: no issue, a cross-compiler is already expected
+- LinuxThreads: no issue, EABI/OABI has no impact on installed headers.
+
+Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
+Cc: Khem Raj <raj.khem@gmail.com>
+Cc: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
+Cc: Carmelo AMOROSO <carmelo.amoroso@st.com>
+---
+ extra/Configs/Config.arm | 11 -----------
+ libc/sysdeps/linux/arm/Makefile.arch | 9 +++++++--
+ libc/sysdeps/linux/arm/bits/huge_val.h | 4 ++--
+ 3 files changed, 9 insertions(+), 15 deletions(-)
+
+diff --git a/extra/Configs/Config.arm b/extra/Configs/Config.arm
+index 9aa9e56..85f2515 100644
+--- a/extra/Configs/Config.arm
++++ b/extra/Configs/Config.arm
+@@ -12,17 +12,6 @@ config FORCE_OPTIONS_FOR_ARCH
+ default y
+ select ARCH_ANY_ENDIAN
+
+-config CONFIG_ARM_EABI
+- bool "Build for EABI"
+- help
+- If you say 'y' here, functions and constants required by the
+- ARM EABI will be built into the library. You should say 'y'
+- if your compiler uses the ARM EABI, in which case you will also
+- need a kernel supporting the EABI system call interface.
+-
+- If you say 'n' here, then the library will be built for the
+- old Linux ABI.
+-
+ config COMPILE_IN_THUMB_MODE
+ bool "Build using Thumb mode"
+ select USE_BX
+diff --git a/libc/sysdeps/linux/arm/Makefile.arch b/libc/sysdeps/linux/arm/Makefile.arch
+index b53c539..14279e0 100644
+--- a/libc/sysdeps/linux/arm/Makefile.arch
++++ b/libc/sysdeps/linux/arm/Makefile.arch
+@@ -24,7 +24,12 @@ ifeq ($(UCLIBC_HAS_ADVANCED_REALTIME),y)
+ CSRC += posix_fadvise.c posix_fadvise64.c
+ endif
+
+-ifeq ($(CONFIG_ARM_EABI),y)
++# Is our compiler set up for EABI ?
++IS_EABI:=$(shell $(CC) $(CFLAGS) -x c - -E -dM </dev/null 2>/dev/null \
++ |sed -r -e '/^\#[[:space:]]*define[[:space:]]+__ARM_EABI__([[:space:]]+1)?$$/!d; s/.+/y/;' \
++ )
++
++ifeq ($(IS_EABI),y)
+ CSRC += aeabi_assert.c aeabi_atexit.c aeabi_errno_addr.c \
+ aeabi_localeconv.c aeabi_memclr.c aeabi_memcpy.c \
+ aeabi_memmove.c aeabi_memset.c find_exidx.c
+@@ -37,7 +42,7 @@ else
+ CSRC += syscall.c
+ endif
+
+-ifeq ($(CONFIG_ARM_EABI),y)
++ifeq ($(IS_EABI),y)
+ libc-static-y += $(ARCH_OUT)/aeabi_lcsts.o $(ARCH_OUT)/aeabi_math.o \
+ $(ARCH_OUT)/aeabi_sighandlers.o
+ libc-nonshared-y += $(ARCH_OUT)/aeabi_lcsts.os $(ARCH_OUT)/aeabi_math.os \
+diff --git a/libc/sysdeps/linux/arm/bits/huge_val.h b/libc/sysdeps/linux/arm/bits/huge_val.h
+index a215f3c..745e0bb 100644
+--- a/libc/sysdeps/linux/arm/bits/huge_val.h
++++ b/libc/sysdeps/linux/arm/bits/huge_val.h
+@@ -32,7 +32,7 @@
+ # define HUGE_VAL (__extension__ 0x1.0p2047)
+ #elif defined __GNUC__
+
+-#ifndef __CONFIG_ARM_EABI__
++#ifndef __ARM_EABI__
+ # define HUGE_VAL \
+ (__extension__ \
+ ((union { unsigned __l __attribute__((__mode__(__DI__))); double __d; }) \
+@@ -50,7 +50,7 @@
+
+ typedef union { unsigned char __c[8]; double __d; } __huge_val_t;
+
+-#ifndef __CONFIG_ARM_EABI__
++#ifndef __ARM_EABI__
+ # if __BYTE_ORDER == __BIG_ENDIAN
+ # define __HUGE_VAL_bytes { 0, 0, 0, 0, 0x7f, 0xf0, 0, 0 }
+ # endif
+--
+1.7.1
+