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author | Evgeniy Didin <Evgeniy.Didin@synopsys.com> | 2017-07-12 18:00:31 +0300 |
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committer | Hauke Mehrtens <hauke@hauke-m.de> | 2017-07-18 23:23:27 +0200 |
commit | 8647f4f018e4dee663b65948d75105fae7bb3cdc (patch) | |
tree | 35e9dc4b1775d9935c846ca4f99cc314715ba57c /toolchain/gcc/patches/arc-2017.03-release/001-revert_register_mode_search.patch | |
parent | 6f133a44023e4f6941341186a0951e77dd108d50 (diff) | |
download | upstream-8647f4f018e4dee663b65948d75105fae7bb3cdc.tar.gz upstream-8647f4f018e4dee663b65948d75105fae7bb3cdc.tar.bz2 upstream-8647f4f018e4dee663b65948d75105fae7bb3cdc.zip |
toolchain/arc: update to the most recent release arc-2017.03
arc-2017.03 is the most recent release toolchain for ARC cores
and it is based on upstream Binutils 2.28 and GCC 6.3.0
Signed-off-by: Evgeniy Didin <Evgeniy.Didin@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: John Crispin <john@phrozen.org>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'toolchain/gcc/patches/arc-2017.03-release/001-revert_register_mode_search.patch')
-rw-r--r-- | toolchain/gcc/patches/arc-2017.03-release/001-revert_register_mode_search.patch | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/arc-2017.03-release/001-revert_register_mode_search.patch b/toolchain/gcc/patches/arc-2017.03-release/001-revert_register_mode_search.patch new file mode 100644 index 0000000000..bd6fbdb4a9 --- /dev/null +++ b/toolchain/gcc/patches/arc-2017.03-release/001-revert_register_mode_search.patch @@ -0,0 +1,65 @@ +Revert of: + +commit 275035b56823b26d5fb7e90fad945b998648edf2 +Author: bergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4> +Date: Thu Sep 5 14:09:07 2013 +0000 + + PR target/58139 + * reginfo.c (choose_hard_reg_mode): Scan through all mode classes + looking for widest mode. + + + git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@202286 138bc75d-0d04-0410-961f-82ee72b054a4 + + +--- a/gcc/reginfo.c ++++ b/gcc/reginfo.c +@@ -625,35 +625,40 @@ choose_hard_reg_mode (unsigned int regno + mode = GET_MODE_WIDER_MODE (mode)) + if ((unsigned) hard_regno_nregs[regno][mode] == nregs + && HARD_REGNO_MODE_OK (regno, mode) +- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) +- && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) ++ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) + found_mode = mode; + ++ if (found_mode != VOIDmode) ++ return found_mode; ++ + for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); + mode != VOIDmode; + mode = GET_MODE_WIDER_MODE (mode)) + if ((unsigned) hard_regno_nregs[regno][mode] == nregs + && HARD_REGNO_MODE_OK (regno, mode) +- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) +- && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) ++ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) + found_mode = mode; + ++ if (found_mode != VOIDmode) ++ return found_mode; ++ + for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT); + mode != VOIDmode; + mode = GET_MODE_WIDER_MODE (mode)) + if ((unsigned) hard_regno_nregs[regno][mode] == nregs + && HARD_REGNO_MODE_OK (regno, mode) +- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) +- && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) ++ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) + found_mode = mode; + ++ if (found_mode != VOIDmode) ++ return found_mode; ++ + for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT); + mode != VOIDmode; + mode = GET_MODE_WIDER_MODE (mode)) + if ((unsigned) hard_regno_nregs[regno][mode] == nregs + && HARD_REGNO_MODE_OK (regno, mode) +- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) +- && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) ++ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) + found_mode = mode; + + if (found_mode != VOIDmode) |