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| author | Syrone Wong <wong.syrone@gmail.com> | 2018-07-27 18:32:03 +0800 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2018-08-20 09:24:33 +0200 |
| commit | 2fb95f71425cc1b3cc9424bb2922fd296e4e05bf (patch) | |
| tree | 99c4058eff16a718198be7a02ee14f457708496f /toolchain/gcc/patches/8.2.0/110-Fix-MIPS-PR-84790.patch | |
| parent | 713cee6463a8b654d2c72e469112130373c1336b (diff) | |
| download | upstream-2fb95f71425cc1b3cc9424bb2922fd296e4e05bf.tar.gz upstream-2fb95f71425cc1b3cc9424bb2922fd296e4e05bf.tar.bz2 upstream-2fb95f71425cc1b3cc9424bb2922fd296e4e05bf.zip | |
toolchain/gcc: update 8.x to 8.2.0
This release fixes LTO link-time performance problems and C++ bug introduced in GCC 8.1
Signed-off-by: Syrone Wong <wong.syrone@gmail.com>
Diffstat (limited to 'toolchain/gcc/patches/8.2.0/110-Fix-MIPS-PR-84790.patch')
| -rw-r--r-- | toolchain/gcc/patches/8.2.0/110-Fix-MIPS-PR-84790.patch | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/8.2.0/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches/8.2.0/110-Fix-MIPS-PR-84790.patch new file mode 100644 index 0000000000..b89eca2faf --- /dev/null +++ b/toolchain/gcc/patches/8.2.0/110-Fix-MIPS-PR-84790.patch @@ -0,0 +1,20 @@ +Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790. +MIPS16 functions have a static assembler prologue which clobbers +registers v0 and v1. Add these register clobbers to function call +instructions. + +--- a/gcc/config/mips/mips.c ++++ b/gcc/config/mips/mips.c +@@ -3102,6 +3102,12 @@ mips_emit_call_insn (rtx pattern, rtx or + emit_insn (gen_update_got_version ()); + } + ++ if (TARGET_MIPS16 && TARGET_USE_GOT) ++ { ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP); ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode)); ++ } ++ + if (TARGET_MIPS16 + && TARGET_EXPLICIT_RELOCS + && TARGET_CALL_CLOBBERED_GP) |