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| author | Rui Salvaterra <rsalvaterra@gmail.com> | 2021-07-28 12:33:09 +0100 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-08-08 19:50:46 +0200 |
| commit | 0af0ec1b7df8740c7a4b9264f032cfd6dd87d144 (patch) | |
| tree | 934981eede5170a07938722d67175cd014e945c4 /toolchain/gcc/patches/11.2.0/110-Fix-MIPS-PR-84790.patch | |
| parent | 6c659fb80c6bb101d51b66e9631e8ec8116ecc9c (diff) | |
| download | upstream-0af0ec1b7df8740c7a4b9264f032cfd6dd87d144.tar.gz upstream-0af0ec1b7df8740c7a4b9264f032cfd6dd87d144.tar.bz2 upstream-0af0ec1b7df8740c7a4b9264f032cfd6dd87d144.zip | |
toolchain/gcc: bump gcc 11 to 11.2
Patches automatically refreshed.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Diffstat (limited to 'toolchain/gcc/patches/11.2.0/110-Fix-MIPS-PR-84790.patch')
| -rw-r--r-- | toolchain/gcc/patches/11.2.0/110-Fix-MIPS-PR-84790.patch | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/11.2.0/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches/11.2.0/110-Fix-MIPS-PR-84790.patch new file mode 100644 index 0000000000..82ac013d30 --- /dev/null +++ b/toolchain/gcc/patches/11.2.0/110-Fix-MIPS-PR-84790.patch @@ -0,0 +1,20 @@ +Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790. +MIPS16 functions have a static assembler prologue which clobbers +registers v0 and v1. Add these register clobbers to function call +instructions. + +--- a/gcc/config/mips/mips.c ++++ b/gcc/config/mips/mips.c +@@ -3132,6 +3132,12 @@ mips_emit_call_insn (rtx pattern, rtx or + emit_insn (gen_update_got_version ()); + } + ++ if (TARGET_MIPS16 && TARGET_USE_GOT) ++ { ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP); ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode)); ++ } ++ + if (TARGET_MIPS16 + && TARGET_EXPLICIT_RELOCS + && TARGET_CALL_CLOBBERED_GP) |