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| author | Shiji Yang <yangshiji66@qq.com> | 2022-10-27 13:17:12 +0800 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2022-11-09 22:55:33 +0100 |
| commit | 8d4c22a9561dc43e81cfa15fcfdec86c052792cd (patch) | |
| tree | 9df651b3e81371485cce32f13780ec57c61aa34b /target | |
| parent | 520c90854ca73eb6c3d8feeda59766c90bdd4144 (diff) | |
| download | upstream-8d4c22a9561dc43e81cfa15fcfdec86c052792cd.tar.gz upstream-8d4c22a9561dc43e81cfa15fcfdec86c052792cd.tar.bz2 upstream-8d4c22a9561dc43e81cfa15fcfdec86c052792cd.zip | |
ath79: add missing clock name strings in SoC dtsi
For all SoC in the ath79 target, the PLL controller provides 3 main
clocks "cpu", "ddr" and "ahb" through the input clock "ref".
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ath79/dts/ar9330.dtsi | 10 | ||||
| -rw-r--r-- | target/linux/ath79/dts/ar9331.dtsi | 5 | ||||
| -rw-r--r-- | target/linux/ath79/dts/qca953x.dtsi | 2 | ||||
| -rw-r--r-- | target/linux/ath79/dts/qca955x.dtsi | 1 | ||||
| -rw-r--r-- | target/linux/ath79/dts/qca956x.dtsi | 1 |
5 files changed, 14 insertions, 5 deletions
diff --git a/target/linux/ath79/dts/ar9330.dtsi b/target/linux/ath79/dts/ar9330.dtsi index aed8e205ad..9df80e1d5e 100644 --- a/target/linux/ath79/dts/ar9330.dtsi +++ b/target/linux/ath79/dts/ar9330.dtsi @@ -28,6 +28,12 @@ bootargs = "console=ttyATH0,115200"; }; + ref: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "ref"; + }; + ahb { apb { ddr_ctrl: memory-controller@18000000 { @@ -83,7 +89,11 @@ compatible = "qca,ar9330-pll"; reg = <0x18050000 0x100>; + clocks = <&ref>; + clock-names = "ref"; + #clock-cells = <1>; + clock-output-names = "cpu", "ddr", "ahb"; }; wdt: wdt@18060008 { diff --git a/target/linux/ath79/dts/ar9331.dtsi b/target/linux/ath79/dts/ar9331.dtsi index 2141f33863..d363130278 100644 --- a/target/linux/ath79/dts/ar9331.dtsi +++ b/target/linux/ath79/dts/ar9331.dtsi @@ -4,9 +4,4 @@ / { compatible = "qca,ar9331"; - - ref: ref { - compatible = "fixed-clock"; - #clock-cells = <0>; - }; }; diff --git a/target/linux/ath79/dts/qca953x.dtsi b/target/linux/ath79/dts/qca953x.dtsi index 745c736b74..c155e3419f 100644 --- a/target/linux/ath79/dts/qca953x.dtsi +++ b/target/linux/ath79/dts/qca953x.dtsi @@ -104,7 +104,9 @@ #clock-cells = <1>; clock-output-names = "cpu", "ddr", "ahb"; + clocks = <&extosc>; + clock-names = "ref"; }; wdt: wdt@18060008 { diff --git a/target/linux/ath79/dts/qca955x.dtsi b/target/linux/ath79/dts/qca955x.dtsi index b6e08f9f12..0541c4e373 100644 --- a/target/linux/ath79/dts/qca955x.dtsi +++ b/target/linux/ath79/dts/qca955x.dtsi @@ -119,6 +119,7 @@ clock-output-names = "cpu", "ddr", "ahb"; clocks = <&extosc>; + clock-names = "ref"; }; wdt: wdt@18060008 { diff --git a/target/linux/ath79/dts/qca956x.dtsi b/target/linux/ath79/dts/qca956x.dtsi index f2452e9dc7..0ebd5ff5be 100644 --- a/target/linux/ath79/dts/qca956x.dtsi +++ b/target/linux/ath79/dts/qca956x.dtsi @@ -95,6 +95,7 @@ clock-output-names = "cpu", "ddr", "ahb"; clocks = <&extosc>; + clock-names = "ref"; }; wdt: wdt@18060008 { |