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authorChris Blake <chrisrblake93@gmail.com>2022-06-12 14:47:43 -0500
committerChristian Lamparter <chunkeey@gmail.com>2022-06-19 12:31:02 +0200
commit949e8ba521ed7b7fd5b02e34e6706b02c17d0ae3 (patch)
tree19d6292a9c92589133962901d24319a5fee59d0e /target
parent77a14795dfd5488d62ec5f5cf04b7bd7a8c278ee (diff)
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ath79: add support for Netgear PGZNG1
This adds support for the Netgear PGZNG1, also known as the ADT Pulse Gateway. Hardware: CPU: Atheros AR9344 Memory: 256MB Storage: 256MB NAND Hynix H27U2G8F2CTR-BC USB: 1x USB 2.0 Ethernet: 2x 100Mb/s WiFi: Atheros AR9340 2.4GHz 2T2R Leds: 8 LEDs Button: 1x Reset Button UART: Header marked JPE1. Pinout is VCC, TX, RX, GND. The marked pin, closest to the JPE1 marking, is VCC. Note VCC isn't required to be connected for UART to work. Enable Stock Firmware Shell Access: 1. Interrupt u-boot and run the following commands setenv console_mode 1 saveenv reset This will enable a UART shell in the firmware. You can then login using the root password of `icontrol`. If that doesn't work, the device is running a firmware based on OpenWRT where you can drop into failsafe to mount the FS and then modify /etc/passwd. Installation Instructions: 1. Interupt u-boot and run the following commands setenv active_image 0 setenv stock_bootcmd nboot 0x81000000 0 \${kernel_offset} setenv openwrt_bootcmd nboot 0x82000000 0 \${kernel_offset} setenv bootcmd run openwrt_bootcmd saveenv 2. boot initramfs image via TFTP u-boot tftpboot 0x82000000 openwrt-ath79-nand-netgear_pgzng1-initramfs-kernel.bin; bootm 0x82000000 3. Once booted, use LuCI sysupgrade to flash openwrt-ath79-nand-netgear_pgzng1-squashfs-sysupgrade.bin MAC Table: WAN (eth0): xx:xa - caldata 0x0 LAN (eth1): xx:xb - caldata 0x6 WLAN (phy0): xx:xc - burned into ath9k caldata Not Working: Z-Wave RS422 Signed-off-by: Chris Blake <chrisrblake93@gmail.com> (added more hw-info, fixed file permissions) Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Diffstat (limited to 'target')
-rw-r--r--target/linux/ath79/dts/ar9344_netgear_pgzng1.dts333
-rw-r--r--target/linux/ath79/image/nand.mk17
-rw-r--r--target/linux/ath79/nand/base-files/etc/board.d/01_leds8
-rw-r--r--target/linux/ath79/nand/base-files/etc/board.d/02_network3
-rw-r--r--target/linux/ath79/nand/base-files/etc/init.d/boot-leds17
5 files changed, 378 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/ar9344_netgear_pgzng1.dts b/target/linux/ath79/dts/ar9344_netgear_pgzng1.dts
new file mode 100644
index 0000000000..5b91dd1e4d
--- /dev/null
+++ b/target/linux/ath79/dts/ar9344_netgear_pgzng1.dts
@@ -0,0 +1,333 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "ar9344.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/leds/leds-pca955x.h>
+
+/ {
+ model = "Netgear PGZNG1";
+ compatible = "netgear,pgzng1", "qca,ar9344";
+
+ aliases {
+ led-boot = &led_power_green;
+ led-failsafe = &led_power_red;
+ led-running = &led_power_green;
+ led-upgrade = &led_power_green;
+ label-mac-device = &eth0;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "Reset button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ i2c {
+ compatible = "i2c-gpio";
+ sda-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio 13 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ expander0: pca9551@60 {
+ compatible = "nxp,pca9551";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led_power_green: led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_BOOT;
+ type = <PCA955X_TYPE_LED>;
+ chan-name = "green:boot";
+ };
+
+ led_power_red: led@1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_BOOT;
+ type = <PCA955X_TYPE_LED>;
+ chan-name = "red:boot";
+ };
+
+ led@2 {
+ reg = <2>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_WAN;
+ function-enumerator = <1>;
+ type = <PCA955X_TYPE_LED>;
+ };
+
+ led@3 {
+ reg = <3>;
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_WAN;
+ type = <PCA955X_TYPE_LED>;
+ };
+
+ led@4 {
+ reg = <4>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_WLAN;
+ type = <PCA955X_TYPE_LED>;
+ };
+
+ led@5 {
+ reg = <5>;
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_WLAN;
+ type = <PCA955X_TYPE_LED>;
+ };
+
+ led@6 {
+ reg = <6>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ type = <PCA955X_TYPE_LED>;
+ };
+
+ led@7 {
+ reg = <7>;
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_INDICATOR;
+ type = <PCA955X_TYPE_LED>;
+ };
+ };
+
+ expander1: pca9551@61 {
+ compatible = "nxp,pca9551";
+ reg = <0x61>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ /* zwave_rst - Resets ZWave */
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ /* em_rst - Unknown */
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ /* tp34 - Test point on PCB? */
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ /* sw_rst - resets SoC */
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
+ rtc@6f {
+ compatible = "isil,isl1208";
+ reg = <0x6f>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ eth1_link {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ eth1_act {
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_LAN;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ eth0_link {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_WAN;
+ function-enumerator = <0>;
+ gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ eth0_act {
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_WAN;
+ gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&eth0 {
+ status = "okay";
+ phy-handle = <&swphy0>;
+
+ nvmem-cells = <&macaddr_caldata_6>;
+ nvmem-cell-names = "mac-address";
+};
+
+&eth1 {
+ status = "okay";
+ phy-handle = <&swphy4>;
+
+ nvmem-cells = <&macaddr_caldata_0>;
+ nvmem-cell-names = "mac-address";
+
+ gmac-config {
+ device = <&gmac>;
+ switch-phy-swap = <1>;
+ switch-only-mode = <1>;
+ };
+};
+
+&gpio {
+ gpio_ext_lna0 {
+ gpio-hog;
+ line-name = "ext:lna0";
+ gpios = <18 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
+
+ gpio_ext_lna1 {
+ gpio-hog;
+ line-name = "ext:lna1";
+ gpios = <19 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
+
+ gpio_enable_rs422 {
+ gpio-hog;
+ line-name = "power:rs422";
+ gpios = <20 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
+};
+
+&nand {
+ status = "okay";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x40000 0x40000>;
+ read-only;
+ };
+
+ /* factory kernel used to be reg = <0x80000 0x200000> */
+ partition@80000 {
+ label = "kernel";
+ reg = <0x80000 0x500000>;
+ };
+
+ /* factory rootfs used to be reg = <0x280000 0x5000000> */
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x4d00000>;
+ };
+
+ partition@5280000 {
+ label = "uImage2";
+ reg = <0x5280000 0x200000>;
+ read-only;
+ };
+
+ partition@5480000 {
+ label = "rootfs_bak";
+ reg = <0x5480000 0x5000000>;
+ read-only;
+ };
+
+ partition@a480000 {
+ label = "config";
+ reg = <0xa480000 0x1400000>;
+ read-only;
+ };
+
+ partition@b880000 {
+ label = "storage";
+ reg = <0xb880000 0x4700000>;
+ read-only;
+ };
+
+ partition@ff80000 {
+ label = "dummy";
+ reg = <0xff80000 0x60000>;
+ read-only;
+ };
+
+ caldata: partition@ffe0000 {
+ label = "caldata";
+ reg = <0xffe0000 0x20000>;
+ read-only;
+
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_caldata_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
+
+ macaddr_caldata_6: macaddr@6 {
+ reg = <0x6 0x6>;
+ };
+
+ cal_caldata_1000: cal@1000 {
+ reg = <0x1000 0x440>;
+ };
+ };
+ };
+};
+
+&ref {
+ clock-frequency = <40000000>;
+};
+
+/* zWave is wired up via SPI and UART1 (no idea on pins sadly) */
+&spi {
+ status = "okay";
+};
+
+&wmac {
+ status = "okay";
+
+ nvmem-cells = <&cal_caldata_1000>;
+ nvmem-cell-names = "calibration";
+};
+
+&usb {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
diff --git a/target/linux/ath79/image/nand.mk b/target/linux/ath79/image/nand.mk
index 726fab068f..4e1ac216a5 100644
--- a/target/linux/ath79/image/nand.mk
+++ b/target/linux/ath79/image/nand.mk
@@ -231,6 +231,23 @@ define Device/netgear_ath79_nand
UBINIZE_OPTS := -E 5
endef
+define Device/netgear_pgzng1
+ SOC := ar9344
+ DEVICE_MODEL := PGZNG1
+ DEVICE_VENDOR := NETGEAR
+ DEVICE_ALT0_MODEL := Pulse Gateway
+ DEVICE_ALT0_VENDOR := ADT
+ DEVICE_PACKAGES := kmod-usb2 kmod-usb-ledtrig-usbport kmod-i2c-gpio \
+ kmod-leds-pca955x kmod-rtc-isl1208 kmod-spi-dev
+ KERNEL_SIZE := 5120k
+ IMAGE_SIZE := 83968k
+ PAGESIZE := 2048
+ BLOCKSIZE := 128k
+ KERNEL := kernel-bin | append-dtb | lzma | uImage lzma
+ IMAGE/sysupgrade.bin := sysupgrade-tar | check-size | append-metadata
+endef
+TARGET_DEVICES += netgear_pgzng1
+
define Device/netgear_r6100
SOC := ar9344
DEVICE_MODEL := R6100
diff --git a/target/linux/ath79/nand/base-files/etc/board.d/01_leds b/target/linux/ath79/nand/base-files/etc/board.d/01_leds
index e493298457..41c4fa2527 100644
--- a/target/linux/ath79/nand/base-files/etc/board.d/01_leds
+++ b/target/linux/ath79/nand/base-files/etc/board.d/01_leds
@@ -18,6 +18,14 @@ glinet,gl-xe300)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
ucidef_set_led_switch "lan" "LAN" "green:lan" "switch0" "0x10"
;;
+netgear,pgzng1)
+ ucidef_set_led_wlan "wlan" "WLAN" "green:wlan" "phy0tpt"
+ ucidef_set_led_switch "wan" "WAN" "green:wan-1" "switch0" "0x02" "0xf" "link tx rx"
+ ucidef_set_led_switch "wan-green" "wan link" "green:wan-0" "switch0" "0x02" "0xf" "link"
+ ucidef_set_led_switch "wan-amber" "wan act" "amber:wan" "switch0" "0x02" "0xf" "tx rx"
+ ucidef_set_led_netdev "lan-green" "lan link" "green:lan" "eth1" "link"
+ ucidef_set_led_netdev "lan-amber" "lan act" "amber:lan" "eth1" "tx rx"
+ ;;
netgear,r6100)
ucidef_set_led_netdev "wan-green" "WAN (green)" "green:wan" "eth1"
;;
diff --git a/target/linux/ath79/nand/base-files/etc/board.d/02_network b/target/linux/ath79/nand/base-files/etc/board.d/02_network
index bda4eeb917..01f26fb39d 100644
--- a/target/linux/ath79/nand/base-files/etc/board.d/02_network
+++ b/target/linux/ath79/nand/base-files/etc/board.d/02_network
@@ -30,6 +30,9 @@ ath79_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth0" "4:lan"
;;
+ netgear,pgzng1)
+ ucidef_set_interfaces_lan_wan "eth1" "eth0"
+ ;;
netgear,r6100)
ucidef_set_interface_wan "eth1"
ucidef_add_switch "switch0" \
diff --git a/target/linux/ath79/nand/base-files/etc/init.d/boot-leds b/target/linux/ath79/nand/base-files/etc/init.d/boot-leds
new file mode 100644
index 0000000000..f2a1cc13b8
--- /dev/null
+++ b/target/linux/ath79/nand/base-files/etc/init.d/boot-leds
@@ -0,0 +1,17 @@
+#!/bin/sh /etc/rc.common
+# SPDX-License-Identifier: GPL-2.0-only
+
+START=11
+
+# To support LEDs on boards that have drivers loaded after rootfs, let's
+# re-run diag.sh AFTER kmodloader has finished, but before boot is complete.
+# This is useful for userspace LED drivers, LEDs that rely on i2c, etc.
+
+boot() {
+ case $(board_name) in
+ netgear,pgzng1)
+ . /etc/diag.sh
+ set_led_state preinit_regular
+ ;;
+ esac
+}