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| author | Markus Stockhausen <markus.stockhausen@gmx.de> | 2022-10-03 14:47:18 +0200 |
|---|---|---|
| committer | Sander Vanheule <sander@svanheule.net> | 2022-10-23 22:33:08 +0200 |
| commit | 5c677b2298ed435277782d224be1a10b3d3e9044 (patch) | |
| tree | 5fdcecff86fd202da3e9a246b96771267e65b915 /target | |
| parent | 3cc8011171186d906c547bc6f0c1f8e350edc7cf (diff) | |
| download | upstream-5c677b2298ed435277782d224be1a10b3d3e9044.tar.gz upstream-5c677b2298ed435277782d224be1a10b3d3e9044.tar.bz2 upstream-5c677b2298ed435277782d224be1a10b3d3e9044.zip | |
realtek: timer driver: documentation
Provide some helpful information about the devicetree configuration of
our new driver
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[correct compatible order in examples]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/realtek/files-5.10/Documentation/devicetree/bindings/realtek,otto-timer.yaml | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/target/linux/realtek/files-5.10/Documentation/devicetree/bindings/realtek,otto-timer.yaml b/target/linux/realtek/files-5.10/Documentation/devicetree/bindings/realtek,otto-timer.yaml new file mode 100644 index 0000000000..b508362a72 --- /dev/null +++ b/target/linux/realtek/files-5.10/Documentation/devicetree/bindings/realtek,otto-timer.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/realtek,rtl8300-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek Timer Device Tree Bindings + +maintainers: + - Markus Stockhausen <markus.stockhausen@gmx.de> + +description: | + The Realtek SOCs of the RTL83XX and RTL93XX series have at least 5 known + timers with corresponding interrupt lines . Their speed is derived from the + Lexra Bus (LXB) by dividers. Each timer has a block of 4 control registers in + the address range 0xb800xxxx with following start offsets. + + RTL83XX: 0x3100, 0x3110, 0x3120, 0x3130, 0x3140 + RTL93XX: 0x3200, 0x3210, 0x3220, 0x3230, 0x3240 + +properties: + compatible: + items: + - enum: + - realtek,rtl8380-timer + - realtek,rtl8390-timer + - realtek,rtl9300-timer + - const: realtek,otto-timer + + reg: + minItems: 5 + maxItems: 5 + description: + List of timer register addresses. + + interrupts: + minItems: 5 + maxItems: 5 + description: + List of timer interrupts. + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + timer0: timer@3100 { + compatible = "realtek,rtl8380-timer", "realtek,otto-timer"; + reg = <0x3100 0x10>, <0x3110 0x10>, <0x3120 0x10>, + <0x3130 0x10>, <0x3140 0x10>; + + interrupt-parent = <&intc>; + interrupts = <29 4>, <28 4>, <17 4>, <16 4>, <15 4>; + clocks = <&ccu CLK_LXB>; + }; + - | + timer0: timer@3100 { + compatible = "realtek,rtl8390-timer", "realtek,otto-timer"; + reg = <0x3100 0x10>, <0x3110 0x10>, <0x3120 0x10>, + <0x3130 0x10>, <0x3140 0x10>; + + interrupt-parent = <&intc>; + interrupts = <29 4>, <28 4>, <17 4>, <16 4>, <15 4>; + clocks = <&ccu CLK_LXB>; + }; + - | + timer0: timer@3200 { + compatible = "realtek,rtl9300-timer", "realtek,otto-timer"; + reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>, + <0x3230 0x10>, <0x3240 0x10>; + + interrupt-parent = <&intc>; + interrupts = <7 4>, <8 4>, <9 4>, <10 4>, <11 4>; + clocks = <&ccu CLK_LXB>; + }; + +... |