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author | Gabor Juhos <juhosg@openwrt.org> | 2012-03-07 16:32:46 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2012-03-07 16:32:46 +0000 |
commit | 52a89cd95c95b8aa62bca7ca6a9a46a34a8c239f (patch) | |
tree | 884431b73b09262ae427863276252abb406c2158 /target | |
parent | 0097cf716163e9548d86afe073fb996d51823d68 (diff) | |
download | upstream-52a89cd95c95b8aa62bca7ca6a9a46a34a8c239f.tar.gz upstream-52a89cd95c95b8aa62bca7ca6a9a46a34a8c239f.tar.bz2 upstream-52a89cd95c95b8aa62bca7ca6a9a46a34a8c239f.zip |
generic: ar8216: move port initialization into a separate function
SVN-Revision: 30848
Diffstat (limited to 'target')
-rw-r--r-- | target/linux/generic/files/drivers/net/phy/ar8216.c | 55 |
1 files changed, 31 insertions, 24 deletions
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c index 26a79be7ef..3b7937d72b 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8216.c +++ b/target/linux/generic/files/drivers/net/phy/ar8216.c @@ -718,6 +718,32 @@ out: return 0; } +static void +ar8216_init_port(struct ar8216_priv *priv, int port) +{ + /* Enable port learning and tx */ + priv->write(priv, AR8216_REG_PORT_CTRL(port), + AR8216_PORT_CTRL_LEARN | + (4 << AR8216_PORT_CTRL_STATE_S)); + + priv->write(priv, AR8216_REG_PORT_VLAN(port), 0); + + if (port == AR8216_PORT_CPU) { + priv->write(priv, AR8216_REG_PORT_STATUS(port), + AR8216_PORT_STATUS_LINK_UP | + ((priv->chip == AR8316) ? + AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) | + AR8216_PORT_STATUS_TXMAC | + AR8216_PORT_STATUS_RXMAC | + ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) | + ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) | + AR8216_PORT_STATUS_DUPLEX); + } else { + priv->write(priv, AR8216_REG_PORT_STATUS(port), + AR8216_PORT_STATUS_LINK_AUTO); + } +} + static int ar8216_reset_switch(struct switch_dev *dev) { @@ -730,30 +756,11 @@ ar8216_reset_switch(struct switch_dev *dev) for (i = 0; i < AR8X16_MAX_VLANS; i++) { priv->vlan_id[i] = i; } - for (i = 0; i < AR8216_NUM_PORTS; i++) { - /* Enable port learning and tx */ - priv->write(priv, AR8216_REG_PORT_CTRL(i), - AR8216_PORT_CTRL_LEARN | - (4 << AR8216_PORT_CTRL_STATE_S)); - - priv->write(priv, AR8216_REG_PORT_VLAN(i), 0); - - /* Configure all PHYs */ - if (i == AR8216_PORT_CPU) { - priv->write(priv, AR8216_REG_PORT_STATUS(i), - AR8216_PORT_STATUS_LINK_UP | - ((priv->chip == AR8316) ? - AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) | - AR8216_PORT_STATUS_TXMAC | - AR8216_PORT_STATUS_RXMAC | - ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) | - ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) | - AR8216_PORT_STATUS_DUPLEX); - } else { - priv->write(priv, AR8216_REG_PORT_STATUS(i), - AR8216_PORT_STATUS_LINK_AUTO); - } - } + + /* Configure all ports */ + for (i = 0; i < AR8216_NUM_PORTS; i++) + ar8216_init_port(priv, i); + /* XXX: undocumented magic from atheros, required! */ priv->write(priv, 0x38, 0xc000050e); |