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authorFlorian Fainelli <florian@openwrt.org>2007-08-06 18:40:28 +0000
committerFlorian Fainelli <florian@openwrt.org>2007-08-06 18:40:28 +0000
commit30af9662132004df9dfd687ed1386770334c7078 (patch)
tree37bc195b45c53c57091634a44c0f87fbb4ffa318 /target
parent2607706f314e455fcd4296b205705757e8cf364c (diff)
downloadupstream-30af9662132004df9dfd687ed1386770334c7078.tar.gz
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Put back some code from the 2.4 driver, supposed to boot network perfs
SVN-Revision: 8354
Diffstat (limited to 'target')
-rw-r--r--target/linux/rdc-2.6/files/drivers/net/r6040.c35
1 files changed, 23 insertions, 12 deletions
diff --git a/target/linux/rdc-2.6/files/drivers/net/r6040.c b/target/linux/rdc-2.6/files/drivers/net/r6040.c
index de58e657b1..135ea13fde 100644
--- a/target/linux/rdc-2.6/files/drivers/net/r6040.c
+++ b/target/linux/rdc-2.6/files/drivers/net/r6040.c
@@ -861,18 +861,19 @@ for (i = 0; i < RX_DCNT; i++) {
outw(MAX_BUF_SIZE, ioaddr+0x18);
if ((lp->switch_sig = phy_read(ioaddr, 0, 2)) == 0x0243) // ICPlus IP175C Signature
-{
- phy_write(ioaddr, 29,31, 0x175C); //Enable registers
- lp->phy_mode = 0x8000;
-} else {
- /* PHY Mode Check */
- phy_write(ioaddr, lp->phy_addr, 4, PHY_CAP);
- phy_write(ioaddr, lp->phy_addr, 0, PHY_MODE);
-
- if (PHY_MODE == 0x3100)
- lp->phy_mode = phy_mode_chk(dev);
- else lp->phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
-}
+ {
+ phy_write(ioaddr, 29,31, 0x175C); //Enable registers
+ lp->phy_mode = 0x8000;
+ } else {
+ /* PHY Mode Check */
+ phy_write(ioaddr, lp->phy_addr, 4, PHY_CAP);
+ phy_write(ioaddr, lp->phy_addr, 0, PHY_MODE);
+
+ if (PHY_MODE == 0x3100)
+ lp->phy_mode = phy_mode_chk(dev);
+ else
+ lp->phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
+ }
/* MAC Bus Control Register */
outw(MBCR_DEFAULT, ioaddr+0x8);
@@ -880,6 +881,16 @@ for (i = 0; i < RX_DCNT; i++) {
lp->mcr0 |= lp->phy_mode;
outw(lp->mcr0, ioaddr);
+ /* set interrupt waiting time and packet numbers */
+ outw(0x0802, ioaddr + 0x0C);
+ outw(0x0802, ioaddr + 0x10);
+
+ /* upgrade performance (by RDC guys) */
+ phy_write(ioaddr,30,17,(phy_read(ioaddr,30,17)|0x4000)); //bit 14=1
+ phy_write(ioaddr,30,17,~((~phy_read(ioaddr,30,17))|0x2000)); //bit 13=0
+ phy_write(ioaddr,0,19,0x0000);
+ phy_write(ioaddr,0,30,0x01F0);
+
/* Interrupt Mask Register */
outw(R6040_INT_MASK, ioaddr + 0x40);
}