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| author | David Bauer <mail@david-bauer.net> | 2020-04-19 18:28:09 +0200 |
|---|---|---|
| committer | David Bauer <mail@david-bauer.net> | 2020-04-24 20:03:18 +0200 |
| commit | 1f45ed6c994b154e657bbcab4465ce5f41154e7f (patch) | |
| tree | 8dd36ccc06f8f116e75bdbe6b9ff4380cd384c0a /target | |
| parent | fceef288cf4c15d9d04bb3d8492159c48e5e0e7f (diff) | |
| download | upstream-1f45ed6c994b154e657bbcab4465ce5f41154e7f.tar.gz upstream-1f45ed6c994b154e657bbcab4465ce5f41154e7f.tar.bz2 upstream-1f45ed6c994b154e657bbcab4465ce5f41154e7f.zip | |
ath79: fix QCA953x DDR and GPIO compatible bindings
The memory as well as GPIO controller had the wrong SoC name used for
their compatible binding.
Signed-off-by: David Bauer <mail@david-bauer.net>
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ath79/dts/qca953x.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ath79/dts/qca953x.dtsi b/target/linux/ath79/dts/qca953x.dtsi index f7e0703e4e..af85e8482a 100644 --- a/target/linux/ath79/dts/qca953x.dtsi +++ b/target/linux/ath79/dts/qca953x.dtsi @@ -34,7 +34,7 @@ ahb { apb { ddr_ctrl: memory-controller@18000000 { - compatible = "qca,ar9530-ddr-controller", + compatible = "qca,qca9530-ddr-controller", "qca,ar7240-ddr-controller"; reg = <0x18000000 0x128>; @@ -69,7 +69,7 @@ }; gpio: gpio@18040000 { - compatible = "qca,ar9530-gpio", + compatible = "qca,qca9530-gpio", "qca,ar9340-gpio"; reg = <0x18040000 0x28>; |