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author | Chuanhong Guo <gch981213@gmail.com> | 2020-09-13 18:53:25 +0800 |
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committer | Chuanhong Guo <gch981213@gmail.com> | 2020-09-13 18:53:25 +0800 |
commit | 8126521e11b4da3c3fa79feb794646068dbaa4b1 (patch) | |
tree | 35ab59c71199767e6f4c86be5614e8e2319074fe /target | |
parent | 6f2c95f0cf0519631adb5100ab71f908a2968cca (diff) | |
download | upstream-8126521e11b4da3c3fa79feb794646068dbaa4b1.tar.gz upstream-8126521e11b4da3c3fa79feb794646068dbaa4b1.tar.bz2 upstream-8126521e11b4da3c3fa79feb794646068dbaa4b1.zip |
ramips: mt7621: pbr-m1: increase SPI clock to 50MHz
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target')
-rw-r--r-- | target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts b/target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts index 1e17eadde1..15b717616e 100644 --- a/target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts +++ b/target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts @@ -109,7 +109,8 @@ flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <50000000>; + m25p,fast-read; broken-flash-reset; partitions { |