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| author | Chuanhong Guo <gch981213@gmail.com> | 2018-08-07 12:02:07 +0800 |
|---|---|---|
| committer | Mathias Kresin <dev@kresin.me> | 2018-08-09 18:44:57 +0200 |
| commit | 387736af41444945da6a5e51748e91011569c03e (patch) | |
| tree | b4e09e1c1aef9b377510f7812de0c56cf7a70c71 /target | |
| parent | 23519edbcaa9cfd24b5a6fff44770f0fa9e13f3c (diff) | |
| download | upstream-387736af41444945da6a5e51748e91011569c03e.tar.gz upstream-387736af41444945da6a5e51748e91011569c03e.tar.bz2 upstream-387736af41444945da6a5e51748e91011569c03e.zip | |
ath79: ag71xx: remove PHY reset
Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET
in datasheets will trigger either a reset for builtin switch or assert
an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected
to external PHY/switch. None of them should be triggered every time an
interface is brought up in ethernet driver.
Remove PHY reset support from ag71xx and definition for them in dtsi.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target')
6 files changed, 6 insertions, 22 deletions
diff --git a/target/linux/ath79/dts/ar7100.dtsi b/target/linux/ath79/dts/ar7100.dtsi index 9957b8df60..8994a7d688 100644 --- a/target/linux/ath79/dts/ar7100.dtsi +++ b/target/linux/ath79/dts/ar7100.dtsi @@ -180,8 +180,8 @@ pll-handle = <&pll>; phy-mode = "rgmii"; - resets = <&rst 8>, <&rst 9>; - reset-names = "phy", "mac"; + resets = <&rst 9>; + reset-names = "mac"; }; &mdio1 { @@ -199,6 +199,6 @@ phy-mode = "rgmii"; - resets = <&rst 12>, <&rst 13>; - reset-names = "phy", "mac"; + resets = <&rst 13>; + reset-names = "mac"; }; diff --git a/target/linux/ath79/dts/ar7161_netgear_wndr3800.dts b/target/linux/ath79/dts/ar7161_netgear_wndr3800.dts index 8e28c4d90f..725583c491 100644 --- a/target/linux/ath79/dts/ar7161_netgear_wndr3800.dts +++ b/target/linux/ath79/dts/ar7161_netgear_wndr3800.dts @@ -207,8 +207,5 @@ mtd-mac-address = <&art 0x06>; - resets = <&rst 13>; - reset-names = "mac"; - phy-handle = <&phy4>; }; diff --git a/target/linux/ath79/dts/ar9132.dtsi b/target/linux/ath79/dts/ar9132.dtsi index d079811fe6..f3105e330d 100644 --- a/target/linux/ath79/dts/ar9132.dtsi +++ b/target/linux/ath79/dts/ar9132.dtsi @@ -191,6 +191,6 @@ pll-data = <0x1a000000 0x13000a44 0x00441099>; pll-reg = <0x4 0x10 17>; pll-handle = <&pll>; - resets = <&rst 8>, <&rst 9>; - reset-names = "phy", "mac"; + resets = <&rst 9>; + reset-names = "mac"; }; diff --git a/target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts b/target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts index 58fc8a5832..b97b57f586 100644 --- a/target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts +++ b/target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts @@ -140,9 +140,6 @@ phy-mode = "rgmii"; mtd-mac-address = <&uboot 0x1fc00>; - resets = <&rst 9>; - reset-names = "mac"; - fixed-link { speed = <1000>; full-duplex; diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h index 70c8582294..377b9f8fe2 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -186,7 +186,6 @@ struct ag71xx { struct timer_list oom_timer; struct reset_control *mac_reset; - struct reset_control *phy_reset; u32 fifodata[3]; u32 plldata[3]; diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 3a25904d56..4f1c75fbff 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -423,13 +423,6 @@ static void ag71xx_hw_init(struct ag71xx *ag) { ag71xx_hw_stop(ag); - if (ag->phy_reset) { - reset_control_assert(ag->phy_reset); - msleep(50); - reset_control_deassert(ag->phy_reset); - msleep(200); - } - ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR); udelay(20); @@ -1313,8 +1306,6 @@ static int ag71xx_probe(struct platform_device *pdev) goto err_free; } - ag->phy_reset = devm_reset_control_get_optional(&pdev->dev, "phy"); - if (of_property_read_u32_array(np, "fifo-data", ag->fifodata, 3)) { if (of_device_is_compatible(np, "qca,ar9130-eth") || of_device_is_compatible(np, "qca,ar7100-eth")) { |