diff options
| author | John Crispin <john@openwrt.org> | 2016-03-20 14:41:21 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2016-03-20 14:41:21 +0000 |
| commit | daf7ab04ba0f9ee7b9ad053879a4e4eb06d653a7 (patch) | |
| tree | 95a8e03ebe4b2b1741cfca5a7cfe232a8bafdcaf /target | |
| parent | 174bc392ffcae5d3759a73ebafad7f63953493c3 (diff) | |
| download | upstream-daf7ab04ba0f9ee7b9ad053879a4e4eb06d653a7.tar.gz upstream-daf7ab04ba0f9ee7b9ad053879a4e4eb06d653a7.tar.bz2 upstream-daf7ab04ba0f9ee7b9ad053879a4e4eb06d653a7.zip | |
oxnas: also reset GPIO B registers on boot
Clear both, SYS_CTRL_*_SEL and SEC_CTRL_*_SEL on boot instead of
writing to SYS_CTRL_*_SEL twice which looks like a copy-paste error.
Thanks to anonymous to bring this up in #21892!
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
SVN-Revision: 49042
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c b/target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c index 2a8ada81bf..1e3b12d1a2 100644 --- a/target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c +++ b/target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c @@ -152,12 +152,12 @@ void ox820_assert_system_reset(enum reboot_mode mode, const char *cmd) writel(0, SYS_CTRL_ALTERNATIVE_SEL); writel(0, SYS_CTRL_PULLUP_SEL); - writel(0, SYS_CTRL_SECONDARY_SEL); - writel(0, SYS_CTRL_TERTIARY_SEL); - writel(0, SYS_CTRL_QUATERNARY_SEL); - writel(0, SYS_CTRL_DEBUG_SEL); - writel(0, SYS_CTRL_ALTERNATIVE_SEL); - writel(0, SYS_CTRL_PULLUP_SEL); + writel(0, SEC_CTRL_SECONDARY_SEL); + writel(0, SEC_CTRL_TERTIARY_SEL); + writel(0, SEC_CTRL_QUATERNARY_SEL); + writel(0, SEC_CTRL_DEBUG_SEL); + writel(0, SEC_CTRL_ALTERNATIVE_SEL); + writel(0, SEC_CTRL_PULLUP_SEL); /* No need to save any state, as the ROM loader can determine whether * reset is due to power cycling or programatic action, just hit the |