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authorDavid Bauer <mail@david-bauer.net>2021-04-14 23:58:25 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2021-04-18 12:05:00 +0200
commitcc6ad94fb920a5577239d60d42d8f1ec8d9b668c (patch)
treefba6ee1d08b82941384deb8c4a63dc4127dc4200 /target
parent8437c24f0976596a0eb1c7d19d0f5262df06312f (diff)
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ath79: fix 10 Mbit PLL data for UniFi AC
Fix the PLL register value for 10 Mbit/s link modes on the UniFi AC Lite / Mesh / LR. Otherwise, 10 Mbit/s links do not transfer data. Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 956407292dc5fd41f2d8c7cc7e9ec77eb6444c1e)
Diffstat (limited to 'target')
-rw-r--r--target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi b/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi
index b9a5b55cd6..b41e90abe8 100644
--- a/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi
+++ b/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi
@@ -24,4 +24,6 @@
mtd-mac-address = <&art 0x0>;
phy-mode = "sgmii";
phy-handle = <&phy4>;
+
+ pll-data = <0x03000000 0x00000101 0x00001313>;
};