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authorFlorian Fainelli <florian@openwrt.org>2007-06-21 17:20:19 +0000
committerFlorian Fainelli <florian@openwrt.org>2007-06-21 17:20:19 +0000
commit02619c31b588a2616e0cffdb760cf352dac6cd8b (patch)
tree8e07ff69ecb5b014287a8307f1c49414b268bc4b /target
parent0becec394fb554de9490d86c4e6decb24bc9fd42 (diff)
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Fix the IRQ assignment with vlynq/pci, thanks sw ! (#1865)
SVN-Revision: 7689
Diffstat (limited to 'target')
-rw-r--r--target/linux/ar7-2.6/files/arch/mips/ar7/vlynq-pci.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq-pci.c b/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq-pci.c
index a32ea8d44c..eb11a3b002 100644
--- a/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq-pci.c
+++ b/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq-pci.c
@@ -178,9 +178,11 @@ static int vlynq_config_read(struct pci_bus *bus, unsigned int devfn, int where,
case PCI_INTERRUPT_LINE:
case PCI_CARDBUS_CIS:
case PCI_CAPABILITY_LIST:
- case PCI_INTERRUPT_PIN:
*val = 0;
break;
+ case PCI_INTERRUPT_PIN:
+ *val = 1;
+ break;
default:
printk("%s: Read of unknown register 0x%x (size %d)\n",
dev->dev.bus_id, where, size);