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authorGabor Juhos <juhosg@openwrt.org>2012-05-27 17:09:56 +0000
committerGabor Juhos <juhosg@openwrt.org>2012-05-27 17:09:56 +0000
commit78a750dcce7f4af6bc4b5e5c51f96652b109ad61 (patch)
tree0a2882dc3746a7a35ffe9f625235c193c28a9216 /target
parent0622fdd82c5253b825a3d89ade4c7b73b86ee6bc (diff)
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ramips: rt3883: fix GPIO reservation for the SPI pins
SVN-Revision: 31920
Diffstat (limited to 'target')
-rw-r--r--target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c b/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c
index 9f9141266c..e397b854ea 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c
@@ -156,7 +156,7 @@ void __init rt3883_gpio_init(u32 mode)
rt3883_gpio_reserve(RT3883_GPIO_I2C_SD, RT3883_GPIO_I2C_SCLK);
if ((mode & RT3883_GPIO_MODE_SPI) == 0)
- rt3883_gpio_reserve(RT3883_GPIO_SPI_CS0, RT3883_GPIO_SPI_CLK);
+ rt3883_gpio_reserve(RT3883_GPIO_SPI_CS0, RT3883_GPIO_SPI_MISO);
t = mode >> RT3883_GPIO_MODE_UART0_SHIFT;
t &= RT3883_GPIO_MODE_UART0_MASK;