diff options
| author | John Crispin <john@openwrt.org> | 2014-02-18 13:33:16 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2014-02-18 13:33:16 +0000 |
| commit | 363512b8c636475d6faf8042900a873e27312e68 (patch) | |
| tree | c2633e475c9f2f5f6c85f034820db05da237ca2b /target | |
| parent | 9bf6569f68949207da05270775c52623a1dfc6d6 (diff) | |
| download | upstream-363512b8c636475d6faf8042900a873e27312e68.tar.gz upstream-363512b8c636475d6faf8042900a873e27312e68.tar.bz2 upstream-363512b8c636475d6faf8042900a873e27312e68.zip | |
ralink: fix the gpio mode mapping
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 39609
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ramips/patches-3.10/999-pinctrl_fixes.patch | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.10/999-pinctrl_fixes.patch b/target/linux/ramips/patches-3.10/999-pinctrl_fixes.patch new file mode 100644 index 0000000000..21236b1293 --- /dev/null +++ b/target/linux/ramips/patches-3.10/999-pinctrl_fixes.patch @@ -0,0 +1,35 @@ +Index: linux-3.10.28/drivers/pinctrl/pinctrl-rt2880.c +=================================================================== +--- linux-3.10.28.orig/drivers/pinctrl/pinctrl-rt2880.c 2014-02-14 10:46:06.216549358 +0000 ++++ linux-3.10.28/drivers/pinctrl/pinctrl-rt2880.c 2014-02-14 14:58:18.580040433 +0000 +@@ -204,6 +204,7 @@ + { + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev); + u32 mode = 0; ++ int i; + + /* dont allow double use */ + if (p->groups[group].enabled) { +@@ -217,16 +218,16 @@ + mode = rt_sysc_r32(SYSC_REG_GPIO_MODE); + mode &= ~(p->groups[group].mask << p->groups[group].shift); + ++ /* mark the pins as gpio */ ++ for (i = 0; i < p->groups[group].func[0].pin_count; i++) ++ p->gpio[p->groups[group].func[0].pins[i]] = 1; ++ + /* function 0 is gpio and needs special handling */ + if (func == 0) { +- int i; +- +- + mode |= p->groups[group].gpio << p->groups[group].shift; +- /* mark the pins as gpio */ +- for (i = 0; i < p->groups[group].func[0].pin_count; i++) +- p->gpio[p->groups[group].func[0].pins[i]] = 1; + } else { ++ for (i = 0; i < p->func[func]->pin_count; i++) ++ p->gpio[p->func[func]->pins[i]] = 0; + mode |= p->func[func]->value << p->groups[group].shift; + } + rt_sysc_w32(mode, SYSC_REG_GPIO_MODE); |