diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2010-03-08 12:10:14 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2010-03-08 12:10:14 +0000 |
| commit | 6c1be20c2ab42a335eba4891c176fdb1f67bcd0d (patch) | |
| tree | eb698a66d5fbd132db3b9299d3bea7eb56bc82ce /target | |
| parent | 945cfb905943a5e30a3f6695c44de1cbfb8d1f3b (diff) | |
| download | upstream-6c1be20c2ab42a335eba4891c176fdb1f67bcd0d.tar.gz upstream-6c1be20c2ab42a335eba4891c176fdb1f67bcd0d.tar.bz2 upstream-6c1be20c2ab42a335eba4891c176fdb1f67bcd0d.zip | |
ar71xx: add ar71xx_gpio_function_setup
SVN-Revision: 20053
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c | 21 | ||||
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h | 1 |
2 files changed, 21 insertions, 1 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c index c1990ad453..25b506cb54 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c @@ -1,7 +1,7 @@ /* * Atheros AR71xx SoC GPIO API support * - * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org> + * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> * * This program is free software; you can redistribute it and/or modify it @@ -109,6 +109,8 @@ void ar71xx_gpio_function_enable(u32 mask) spin_lock_irqsave(&ar71xx_gpio_lock, flags); ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) | mask); + /* flush write */ + (void) ar71xx_gpio_rr(GPIO_REG_FUNC); spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); } @@ -120,10 +122,27 @@ void ar71xx_gpio_function_disable(u32 mask) spin_lock_irqsave(&ar71xx_gpio_lock, flags); ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) & ~mask); + /* flush write */ + (void) ar71xx_gpio_rr(GPIO_REG_FUNC); spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); } +void ar71xx_gpio_function_setup(u32 set, u32 clear) +{ + unsigned long flags; + + spin_lock_irqsave(&ar71xx_gpio_lock, flags); + + ar71xx_gpio_wr(GPIO_REG_FUNC, + (ar71xx_gpio_rr(GPIO_REG_FUNC) & ~clear) | set); + /* flush write */ + (void) ar71xx_gpio_rr(GPIO_REG_FUNC); + + spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); +} +EXPORT_SYMBOL(ar71xx_gpio_function_setup); + void __init ar71xx_gpio_init(void) { int err; diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h index 00e7cbc4b7..e9e68f16df 100644 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h @@ -269,6 +269,7 @@ static inline u32 ar71xx_gpio_rr(unsigned reg) void ar71xx_gpio_init(void) __init; void ar71xx_gpio_function_enable(u32 mask); void ar71xx_gpio_function_disable(u32 mask); +void ar71xx_gpio_function_setup(u32 set, u32 clear); /* * DDR_CTRL block |