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authorGabor Juhos <juhosg@openwrt.org>2010-02-24 13:38:51 +0000
committerGabor Juhos <juhosg@openwrt.org>2010-02-24 13:38:51 +0000
commitf771c3503379387d4a21ce4e6bc71207724647dc (patch)
treeb4c2348e3ffdbe49a077f6d4c11412cc88b67a38 /target
parente251cd15c93e209248041fa36d952729db0a8e72 (diff)
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ar71xx: fix pll value for the eth0 interface on the TL-WR1043ND board
Thanks to Andrew Tarabaras SVN-Revision: 19835
Diffstat (limited to 'target')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c
index 985b9f249f..15dc7529c3 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c
@@ -117,6 +117,7 @@ static void __init tl_wr1043nd_setup(void)
ar71xx_eth0_data.phy_mask = 0x0;
ar71xx_eth0_data.speed = SPEED_1000;
ar71xx_eth0_data.duplex = DUPLEX_FULL;
+ ar71xx_eth0_pll_data.pll_1000 = 0x1a000000;
ar71xx_add_device_eth(0);