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| author | John Crispin <blogic@openwrt.org> | 2015-01-08 20:26:13 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2015-01-08 20:26:13 +0000 |
| commit | 15aa6d23b8ec0d250c48fda3208e52edc91c82c1 (patch) | |
| tree | 8dc5f0fb457ea1f67a91d73888676096223799e3 /target | |
| parent | e8a5bd7e282f47aeca6a52a7f4cfb696daa87d38 (diff) | |
| download | upstream-15aa6d23b8ec0d250c48fda3208e52edc91c82c1.tar.gz upstream-15aa6d23b8ec0d250c48fda3208e52edc91c82c1.tar.bz2 upstream-15aa6d23b8ec0d250c48fda3208e52edc91c82c1.zip | |
ramips: Fix for gpio falling interrupt mask
This patch fixes a wrong mask operation for the rt2880-compatible ralink devices.
The mask operation reads the actual flags and then logical combines it with the pin flag it want to set.
Unfortunally, for rising as for falling interrupt flags the actual flag status of the rising interrupts was used.
That caused a problem if you want to use more than one falling GPIO interrupt.
Now the correct (seperated) actual status is used for both, falling and rising.
Signed-off-by: Jonas Arndt <info@greenwire-elektronik.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43882 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ramips/patches-3.14/999-gpi_irq.patch | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.14/999-gpi_irq.patch b/target/linux/ramips/patches-3.14/999-gpi_irq.patch new file mode 100644 index 0000000000..a421570672 --- /dev/null +++ b/target/linux/ramips/patches-3.14/999-gpi_irq.patch @@ -0,0 +1,42 @@ +--- a/drivers/gpio/gpio-ralink.c ++++ b/drivers/gpio/gpio-ralink.c +@@ -148,14 +148,15 @@ + { + struct ralink_gpio_chip *rg; + unsigned long flags; +- u32 val; ++ u32 rise, fall; + + rg = (struct ralink_gpio_chip *) d->domain->host_data; +- val = rt_gpio_r32(rg, GPIO_REG_RENA); ++ rise = rt_gpio_r32(rg, GPIO_REG_RENA); ++ fall = rt_gpio_r32(rg, GPIO_REG_FENA); + + spin_lock_irqsave(&rg->lock, flags); +- rt_gpio_w32(rg, GPIO_REG_RENA, val | (BIT(d->hwirq) & rg->rising)); +- rt_gpio_w32(rg, GPIO_REG_FENA, val | (BIT(d->hwirq) & rg->falling)); ++ rt_gpio_w32(rg, GPIO_REG_RENA, rise | (BIT(d->hwirq) & rg->rising)); ++ rt_gpio_w32(rg, GPIO_REG_FENA, fall | (BIT(d->hwirq) & rg->falling)); + spin_unlock_irqrestore(&rg->lock, flags); + } + +@@ -163,14 +164,15 @@ + { + struct ralink_gpio_chip *rg; + unsigned long flags; +- u32 val; ++ u32 rise, fall; + + rg = (struct ralink_gpio_chip *) d->domain->host_data; +- val = rt_gpio_r32(rg, GPIO_REG_RENA); ++ rise = rt_gpio_r32(rg, GPIO_REG_RENA); ++ fall = rt_gpio_r32(rg, GPIO_REG_FENA); + + spin_lock_irqsave(&rg->lock, flags); +- rt_gpio_w32(rg, GPIO_REG_FENA, val & ~BIT(d->hwirq)); +- rt_gpio_w32(rg, GPIO_REG_RENA, val & ~BIT(d->hwirq)); ++ rt_gpio_w32(rg, GPIO_REG_FENA, fall & ~BIT(d->hwirq)); ++ rt_gpio_w32(rg, GPIO_REG_RENA, rise & ~BIT(d->hwirq)); + spin_unlock_irqrestore(&rg->lock, flags); + } + |