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authorGabor Juhos <juhosg@openwrt.org>2012-03-18 22:06:36 +0000
committerGabor Juhos <juhosg@openwrt.org>2012-03-18 22:06:36 +0000
commit01cad79e03658964eccfe0cdab5bfff882bee2f5 (patch)
treedea6fca824d6b7168b89b34bebbfecb205f81761 /target
parent56cacb3b21808a58a71fa0b39a9d1e10e1584042 (diff)
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generic: ar8216: add init_globals field to ar8xxx_chip
SVN-Revision: 31004
Diffstat (limited to 'target')
-rw-r--r--target/linux/generic/files/drivers/net/phy/ar8216.c51
1 files changed, 30 insertions, 21 deletions
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c
index 36668646d3..6abb431948 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.c
@@ -44,6 +44,7 @@ struct ar8xxx_chip {
unsigned long caps;
int (*hw_init)(struct ar8216_priv *priv);
+ void (*init_globals)(struct ar8216_priv *priv);
void (*init_port)(struct ar8216_priv *priv, int port);
void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
u32 ingress, u32 members, u32 pvid);
@@ -729,28 +730,33 @@ out:
static void
ar8216_init_globals(struct ar8216_priv *priv)
{
- switch (priv->chip_type) {
- case AR8216:
- /* standard atheros magic */
- priv->write(priv, 0x38, 0xc000050e);
+ /* standard atheros magic */
+ priv->write(priv, 0x38, 0xc000050e);
- ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
- AR8216_GCTRL_MTU, 1518 + 8 + 2);
- break;
- case AR8316:
- /* standard atheros magic */
- priv->write(priv, 0x38, 0xc000050e);
-
- /* enable cpu port to receive multicast and broadcast frames */
- priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
-
- /* fall through */
- case AR8236:
- /* enable jumbo frames */
- ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
- AR8316_GCTRL_MTU, 9018 + 8 + 2);
- break;
- }
+ ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
+ AR8216_GCTRL_MTU, 1518 + 8 + 2);
+}
+
+static void
+ar8236_init_globals(struct ar8216_priv *priv)
+{
+ /* enable jumbo frames */
+ ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
+ AR8316_GCTRL_MTU, 9018 + 8 + 2);
+}
+
+static void
+ar8316_init_globals(struct ar8216_priv *priv)
+{
+ /* standard atheros magic */
+ priv->write(priv, 0x38, 0xc000050e);
+
+ /* enable cpu port to receive multicast and broadcast frames */
+ priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
+
+ /* enable jumbo frames */
+ ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
+ AR8316_GCTRL_MTU, 9018 + 8 + 2);
}
static void
@@ -781,6 +787,7 @@ ar8216_init_port(struct ar8216_priv *priv, int port)
static const struct ar8xxx_chip ar8216_chip = {
.hw_init = ar8216_hw_init,
+ .init_globals = ar8216_init_globals,
.init_port = ar8216_init_port,
.setup_port = ar8216_setup_port,
.atu_flush = ar8216_atu_flush,
@@ -790,6 +797,7 @@ static const struct ar8xxx_chip ar8216_chip = {
static const struct ar8xxx_chip ar8236_chip = {
.hw_init = ar8236_hw_init,
+ .init_globals = ar8236_init_globals,
.init_port = ar8216_init_port,
.setup_port = ar8236_setup_port,
.atu_flush = ar8216_atu_flush,
@@ -800,6 +808,7 @@ static const struct ar8xxx_chip ar8236_chip = {
static const struct ar8xxx_chip ar8316_chip = {
.caps = AR8XXX_CAP_GIGE,
.hw_init = ar8316_hw_init,
+ .init_globals = ar8316_init_globals,
.init_port = ar8216_init_port,
.setup_port = ar8216_setup_port,
.atu_flush = ar8216_atu_flush,