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authorChristian Lamparter <chunkeey@gmail.com>2018-07-16 22:56:35 +0200
committerMathias Kresin <dev@kresin.me>2018-07-19 18:55:20 +0200
commitaee5c53a8d68c9894cc2062db18ca7375af85b4a (patch)
tree7e2c265eb44b3175f1ddc05271f4ab3e7d050ff1 /target
parent54b91c85e786c2a9fbe082befb26130f4ed2a426 (diff)
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apm821xx: fix sata access freezes
The original vendor's driver programmed the dma controller's AHB HPROT values to enable bufferable, privileged mode. This along with the "same priorty for both channels" fixes the freezes according to @takimata, @And.short, that have been reported on the forum by @ticerex. Furtheremore, @takimata reported that the patch also improved the performance of the HDDs considerably: |<https://forum.lede-project.org/t/wd-mybook-live-duo-two-disks/16195/55> |It seems your patch unleashed the full power of the SATA port. |Where I was previously hitting a really hard limit at around |82 MB/s for reading and 27 MB/s for writing, I am now getting this: | |root@OpenWrt:/mnt# time dd if=/dev/zero of=tempfile bs=1M count=1024 |1024+0 records in |1024+0 records out |real 0m 13.65s |user 0m 0.01s |sys 0m 11.89s | |root@OpenWrt:/mnt# time dd if=tempfile of=/dev/null bs=1M count=1024 |1024+0 records in |1024+0 records out |real 0m 8.41s |user 0m 0.01s |sys 0m 4.70s | |This means: 121 MB/s reading and 75 MB/s writing! | |[...] | |The drive is a WD Green WD10EARX taken from an older MBL Single. |I repeated the test a few times with even larger files to rule out |any caching, I'm still seeing the same great performance. OpenWrt is |now completely on par with the original MBL firmware's performance. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Diffstat (limited to 'target')
-rw-r--r--target/linux/apm821xx/patches-4.4/302-dw-dma-hprot-fix-and-equal-priortiy.patch25
1 files changed, 25 insertions, 0 deletions
diff --git a/target/linux/apm821xx/patches-4.4/302-dw-dma-hprot-fix-and-equal-priortiy.patch b/target/linux/apm821xx/patches-4.4/302-dw-dma-hprot-fix-and-equal-priortiy.patch
new file mode 100644
index 0000000000..1e76813225
--- /dev/null
+++ b/target/linux/apm821xx/patches-4.4/302-dw-dma-hprot-fix-and-equal-priortiy.patch
@@ -0,0 +1,25 @@
+--- a/drivers/dma/dw/core.c
++++ b/drivers/dma/dw/core.c
+@@ -150,6 +150,8 @@ static void dwc_initialize(struct dw_dma
+ cfghi |= DWC_CFGH_DST_PER(dwc->dst_id);
+ cfghi |= DWC_CFGH_SRC_PER(dwc->src_id);
+
++ cfghi |= DWC_CFGH_PROTCTL(3); /* bufferable + privileged access */
++
+ channel_writel(dwc, CFG_LO, cfglo);
+ channel_writel(dwc, CFG_HI, cfghi);
+
+@@ -1539,11 +1541,8 @@ int dw_dma_probe(struct dw_dma_chip *chi
+ else
+ list_add(&dwc->chan.device_node, &dw->dma.channels);
+
+- /* 7 is highest priority & 0 is lowest. */
+- if (pdata->chan_priority == CHAN_PRIORITY_ASCENDING)
+- dwc->priority = pdata->nr_channels - i - 1;
+- else
+- dwc->priority = i;
++ /* set all channels to the same priority */
++ dwc->priority = pdata->nr_channels - 1;
+
+ dwc->ch_regs = &__dw_regs(dw)->CHAN[i];
+ spin_lock_init(&dwc->lock);