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authorGabor Juhos <juhosg@openwrt.org>2013-10-30 07:06:23 +0000
committerGabor Juhos <juhosg@openwrt.org>2013-10-30 07:06:23 +0000
commit6bae36faa6174e9f49ebdc5a108e5dccaa43df27 (patch)
tree5b69a3400414d3a9ba8aa364021a48dabca4ffa0 /target
parent11f27fc3b4deade17d3f4b2d5a75bc8204b2a04d (diff)
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ramips: fix number of GPIOs for RT3352
The RT3352 SoC only supports 46 GPIO lines. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@38602 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target')
-rw-r--r--target/linux/ramips/dts/rt3352.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ramips/dts/rt3352.dtsi b/target/linux/ramips/dts/rt3352.dtsi
index ca81bb60ff..6b1f11d770 100644
--- a/target/linux/ramips/dts/rt3352.dtsi
+++ b/target/linux/ramips/dts/rt3352.dtsi
@@ -132,7 +132,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <40>;
- ralink,num-gpios = <12>;
+ ralink,num-gpios = <6>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];