realtek: add support for HPE 1920-8g-poe+

Hardware information:
---------------------

- RTL8380 SoC
- 8 Gigabit RJ45 PoE ports (built-in RTL8218B)
- 2 SFP ports (built-in SerDes)
- RJ45 RS232 port on front panel
- 32 MiB NOR Flash
- 128 MiB DDR3 DRAM
- PT7A7514 watchdog
- PoE chips: Nuvoton M0516LDE + BCM59121

Known issues:
---------------------
- PoE LEDs are uncontrolled.

(Manual taken from f2f09bc00280)
Booting initramfs image:
------------------------

- Prepare a FTP or TFTP server serving the OpenWrt initramfs image and
  connect the server to a switch port.

- Connect to the console port of the device and enter the extended
  boot menu by typing Ctrl+B when prompted.

- Choose the menu option "<3> Enter Ethernet SubMenu".

- Set network parameters via the option "<5> Modify Ethernet Parameter".
  Enter the FTP/TFTP filename as "Load File Name" ("Target File Name"
  can be left blank, it is not required for booting from RAM). Note that
  the configuration is saved on flash, so it only needs to be done once.

- Select "<1> Download Application Program To SDRAM And Run".

Initial installation:
---------------------

- Boot an initramfs image as described above, then use sysupgrade to
  install OpenWrt permanently. After initial installation, the
  bootloader needs to be configured to load the correct image file

- Enter the extended boot menu again and choose "<4> File Control",
  then select "<2> Set Application File type".

- Enter the number of the file "openwrt-kernel.bin" (should be 1), and
  use the option "<1> +Main" to select it as boot image.

- Choose "<0> Exit To Main Menu" and then "<1> Boot System".

NOTE: The bootloader on these devices can only boot from the VFS
filesystem which normally spans most of the flash. With OpenWrt, only
the first part of the firmware partition contains a valid filesystem,
the rest is used for rootfs. As the bootloader does not know about this,
you must not do any file operations in the bootloader, as this may
corrupt the OpenWrt installation (selecting the boot image is an
exception, as it only stores a flag in the bootloader data, but doesn't
write to the filesystem).

Example PoE config file (/etc/config/poe):
---------------------
config global
        option budget   '180'

config port
        option enable   '1'
        option id       '1'
        option name     'lan8'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '2'
        option name     'lan7'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '3'
        option name     'lan6'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '4'
        option name     'lan5'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '5'
        option name     'lan4'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '6'
        option name     'lan3'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '7'
        option name     'lan2'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '8'
        option name     'lan1'
        option poe_plus '1'
        option priority '2'

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
(cherry picked from commit b370753fc409eb2220af7caed9ffd66beed2d041)

6 files changed, 154 insertions, 108 deletions

diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index 1dea2ad5a6..90b45abf94 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -21,6 +21,7 @@ board=$(board_name)
 board_config_update
 
 lan_list=$(ls -1 -v -d /sys/class/net/lan* | xargs -n1 basename | xargs)
+lan_list_rev=$(ls -1 -v -d -r /sys/class/net/lan* | xargs -n1 basename | xargs)
 ucidef_set_bridge_device switch
 ucidef_set_interface_lan "$lan_list"
 
@@ -30,6 +31,7 @@ lan_mac_end=""
 label_mac=""
 case $board in
 hpe,1920-8g|\
+hpe,1920-8g-poe|\
 hpe,1920-16g|\
 hpe,1920-24g)
 	label_mac=$(mtd_get_mac_binary factory 0x68)
@@ -65,6 +67,9 @@ done
 [ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
 
 case $board in
+hpe,1920-8g-poe)
+	ucidef_set_poe 180 "$lan_list_rev" "lan9 lan10"
+	;;
 netgear,gs110tpp-v1)
 	ucidef_set_poe 130 "$lan_list" "lan9 lan10"
 	;;
diff --git a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
new file mode 100644
index 0000000000..abfcb8e592
--- /dev/null
+++ b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
@@ -0,0 +1,16 @@
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+board=$(board_name)
+
+case "$board" in
+hpe,1920-8g-poe)
+	ucidef_add_gpio_switch "fan_ctrl" "Fan control" "456" "0"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g-poe.dts b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g-poe.dts
new file mode 100644
index 0000000000..3b00c31411
--- /dev/null
+++ b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g-poe.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl8380_hpe_1920-8g.dtsi"
+
+/ {
+	compatible = "hpe,1920-8g-poe", "realtek,rtl838x-soc";
+	model = "HPE 1920-8G-PoE+ (JG922A)";
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts
index 6ddb2d8dcc..ac95a00c01 100644
--- a/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts
+++ b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts
@@ -1,115 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
-#include "rtl838x.dtsi"
-#include "rtl838x_hpe_1920.dtsi"
+#include "rtl8380_hpe_1920-8g.dtsi"
 
 / {
 	compatible = "hpe,1920-8g", "realtek,rtl838x-soc";
 	model = "HPE 1920-8G (JG920A)";
-
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
-		gpio-controller;
-		indirect-access-bus-id = <0>;
-	};
-
-	i2c0: i2c-gpio-0 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp0: sfp-0 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c0>;
-		los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
-		// tx-fault and tx-disable unconnected
-	};
-
-	i2c1: i2c-gpio-1 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp1: sfp-1 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c1>;
-		los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
-		// tx-fault and tx-disable unconnected
-	};
-};
-
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		INTERNAL_PHY(24)
-		INTERNAL_PHY(26)
-	};
-};
-
-&switch0 {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		SWITCH_PORT(8, 1, internal)
-		SWITCH_PORT(9, 2, internal)
-		SWITCH_PORT(10, 3, internal)
-		SWITCH_PORT(11, 4, internal)
-		SWITCH_PORT(12, 5, internal)
-		SWITCH_PORT(13, 6, internal)
-		SWITCH_PORT(14, 7, internal)
-		SWITCH_PORT(15, 8, internal)
-
-		port@24 {
-			reg = <24>;
-			label = "lan9";
-			phy-handle = <&phy24>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp0>;
-		};
-
-		port@26 {
-			reg = <26>;
-			label = "lan10";
-			phy-handle = <&phy26>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp1>;
-		};
-
-		port@28 {
-			ethernet = <&ethernet0>;
-			reg = <28>;
-			phy-mode = "internal";
-			fixed-link {
-				speed = <1000>;
-				full-duplex;
-			};
-		};
-	};
 };
diff --git a/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi
new file mode 100644
index 0000000000..58f2c1f6c9
--- /dev/null
+++ b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl838x.dtsi"
+#include "rtl838x_hpe_1920.dtsi"
+
+/ {
+	gpio1: rtl8231-gpio {
+		compatible = "realtek,rtl8231-gpio";
+		#gpio-cells = <2>;
+		gpio-controller;
+		indirect-access-bus-id = <0>;
+	};
+
+	i2c0: i2c-gpio-0 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp0: sfp-0 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c0>;
+		los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
+		// tx-fault and tx-disable unconnected
+	};
+
+	i2c1: i2c-gpio-1 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp1: sfp-1 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c1>;
+		los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
+		// tx-fault and tx-disable unconnected
+	};
+};
+
+&ethernet0 {
+	mdio: mdio-bus {
+		compatible = "realtek,rtl838x-mdio";
+		regmap = <&ethernet0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		INTERNAL_PHY(8)
+		INTERNAL_PHY(9)
+		INTERNAL_PHY(10)
+		INTERNAL_PHY(11)
+		INTERNAL_PHY(12)
+		INTERNAL_PHY(13)
+		INTERNAL_PHY(14)
+		INTERNAL_PHY(15)
+
+		INTERNAL_PHY(24)
+		INTERNAL_PHY(26)
+	};
+};
+
+&switch0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		SWITCH_PORT(8, 1, internal)
+		SWITCH_PORT(9, 2, internal)
+		SWITCH_PORT(10, 3, internal)
+		SWITCH_PORT(11, 4, internal)
+		SWITCH_PORT(12, 5, internal)
+		SWITCH_PORT(13, 6, internal)
+		SWITCH_PORT(14, 7, internal)
+		SWITCH_PORT(15, 8, internal)
+
+		port@24 {
+			reg = <24>;
+			label = "lan9";
+			phy-handle = <&phy24>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp0>;
+		};
+
+		port@26 {
+			reg = <26>;
+			label = "lan10";
+			phy-handle = <&phy26>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp1>;
+		};
+
+		port@28 {
+			ethernet = <&ethernet0>;
+			reg = <28>;
+			phy-mode = "internal";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
+};
diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index 7c7bc8a0e5..73930f4d6f 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -99,6 +99,14 @@ define Device/hpe_1920-8g
 endef
 TARGET_DEVICES += hpe_1920-8g
 
+define Device/hpe_1920-8g-poe
+  $(Device/hpe_1920)
+  SOC := rtl8380
+  DEVICE_MODEL := 1920-8G-PoE+ (JG922A)
+  H3C_DEVICE_ID := 0x00010025
+endef
+TARGET_DEVICES += hpe_1920-8g-poe
+
 define Device/hpe_1920-16g
   $(Device/hpe_1920)
   SOC := rtl8382