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authorÁlvaro Fernández Rojas <noltari@gmail.com>2023-06-10 17:17:11 +0200
committerÁlvaro Fernández Rojas <noltari@gmail.com>2023-06-19 20:41:57 +0200
commit6d3770501d883c3adbfa29b5b4e9451ae84d3ae4 (patch)
treef9ff54d7072d5eaa0cf11d95d75006a40df7777f /target/linux
parent8a0746955d1ea2aba9e7836129d89c3523a46e0e (diff)
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bmips: fix DMA RAC flush
BMIPS_GET_CBR() returns an invalid address on some SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> (cherry picked from commit 62cdca25edc7e02249a7dd01c2218ee83e6ed145)
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/bmips/patches-5.15/203-mips-bmips-dma-fix-CBR-address.patch84
1 files changed, 84 insertions, 0 deletions
diff --git a/target/linux/bmips/patches-5.15/203-mips-bmips-dma-fix-CBR-address.patch b/target/linux/bmips/patches-5.15/203-mips-bmips-dma-fix-CBR-address.patch
new file mode 100644
index 0000000000..57bf395e2e
--- /dev/null
+++ b/target/linux/bmips/patches-5.15/203-mips-bmips-dma-fix-CBR-address.patch
@@ -0,0 +1,84 @@
+From 3e4c3863e0cfb8c2abdff6bb494ca69d3d2aed9c Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Sat, 10 Jun 2023 17:01:40 +0200
+Subject: [PATCH] mips: bmips: dma: fix CBR address
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Some BCM63xx SoCs may return CBR address as 0.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ arch/mips/bmips/dma.c | 12 ++++--------
+ arch/mips/bmips/setup.c | 11 ++++-------
+ 2 files changed, 8 insertions(+), 15 deletions(-)
+
+--- a/arch/mips/bmips/dma.c
++++ b/arch/mips/bmips/dma.c
+@@ -64,11 +64,10 @@ phys_addr_t dma_to_phys(struct device *d
+ return dma_addr;
+ }
+
+-bool bmips_rac_flush_disable;
++void __iomem *bmips_cbr_addr;
+
+ void arch_sync_dma_for_cpu_all(void)
+ {
+- void __iomem *cbr = BMIPS_GET_CBR();
+ u32 cfg;
+
+ if (boot_cpu_type() != CPU_BMIPS3300 &&
+@@ -76,13 +75,10 @@ void arch_sync_dma_for_cpu_all(void)
+ boot_cpu_type() != CPU_BMIPS4380)
+ return;
+
+- if (unlikely(bmips_rac_flush_disable))
+- return;
+-
+ /* Flush stale data out of the readahead cache */
+- cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
+- __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
+- __raw_readl(cbr + BMIPS_RAC_CONFIG);
++ cfg = __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
++ __raw_writel(cfg | 0x100, bmips_cbr_addr + BMIPS_RAC_CONFIG);
++ __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ }
+
+ static int __init bmips_init_dma_ranges(void)
+--- a/arch/mips/bmips/setup.c
++++ b/arch/mips/bmips/setup.c
+@@ -89,7 +89,7 @@
+
+ #define DDR_CSEND_REG 0x8
+
+-extern bool bmips_rac_flush_disable;
++extern void __iomem *bmips_cbr_addr;
+
+ static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
+
+@@ -170,12 +170,6 @@ static void bcm6358_quirks(void)
+ * disable SMP for now
+ */
+ bmips_smp_enabled = 0;
+-
+- /*
+- * RAC flush causes kernel panics on BCM6358 when booting from TP1
+- * because the bootloader is not initializing it properly.
+- */
+- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31));
+ }
+
+ static void bcm6368_quirks(void)
+@@ -198,6 +192,11 @@ static const struct bmips_quirk bmips_qu
+
+ void __init prom_init(void)
+ {
++ if (!(read_c0_brcm_cbr() >> 18))
++ bmips_cbr_addr = (void __iomem *)0xff400000;
++ else
++ bmips_cbr_addr = BMIPS_GET_CBR();
++
+ bmips_cpu_setup();
+ register_bmips_smp_ops();
+ }