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authorJan Forman <jforman@tuta.io>2021-05-15 20:51:14 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2023-05-20 13:43:09 +0200
commit6ea910ab54ffc0640f4e7fc977c1e076f4e86323 (patch)
tree2501d0ec2501df7f4c7db985965398504b801d7f /target/linux
parent7a29230752f232487107b2e0d54fe1f63e733b59 (diff)
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ath79: Create shared dtsi for DIR-859
Create a shared dtsi for the dir-859 and similarly device, it similarly as it done for the dir-842. Signed-off-by: Jan Forman <jforman@tuta.io>
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts113
-rw-r--r--target/linux/ath79/dts/qca9563_dlink_dir-8x9-a1.dtsi118
2 files changed, 119 insertions, 112 deletions
diff --git a/target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts b/target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts
index 140f0b65c6..a828f86cb1 100644
--- a/target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts
+++ b/target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts
@@ -1,9 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "qca956x.dtsi"
-
+#include "qca9563_dlink_dir-8x9-a1.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
/ {
model = "D-Link DIR-859 A1";
@@ -40,113 +38,4 @@
linux,default-trigger = "phy0tpt";
};
};
-
- keys {
- compatible = "gpio-keys";
-
- wps {
- linux,code = <KEY_WPS_BUTTON>;
- gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
- debounce-interval = <60>;
- };
-
- reset {
- linux,code = <KEY_RESTART>;
- gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
- debounce-interval = <60>;
- };
- };
-};
-
-&pcie {
- status = "okay";
-};
-
-&spi {
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <50000000>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "bootloader";
- reg = <0x000000 0x40000>;
- read-only;
- };
-
- partition@40000 {
- label = "bdcfg";
- reg = <0x040000 0x10000>;
- read-only;
- };
-
- partition@50000 {
- label = "devdata";
- reg = <0x050000 0x10000>;
- read-only;
- };
-
- partition@60000 {
- label = "devconf";
- reg = <0x060000 0x10000>;
- read-only;
- };
-
- partition@70000 {
- compatible = "seama";
- label = "firmware";
- reg = <0x070000 0xf80000>;
- };
-
- art: partition@ff0000 {
- label = "art";
- reg = <0xff0000 0x010000>;
- read-only;
- };
- };
- };
-};
-
-&mdio0 {
- status = "okay";
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- phy-mode = "sgmii";
- qca,mib-poll-interval = <500>;
-
- reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
-
- qca,ar8327-initvals = <
- 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
- 0x10 0x81000080 /* POWER_ON_STRAP */
- 0x50 0xcc35cc35 /* LED_CTRL0 */
- 0x54 0xcb37cb37 /* LED_CTRL1 */
- 0x58 0x00000000 /* LED_CTRL2 */
- 0x5c 0x00f3cf00 /* LED_CTRL3 */
- 0x7c 0x0000007e /* PORT0_STATUS */
- >;
- };
-};
-
-&eth0 {
- status = "okay";
-
- pll-data = <0x03000101 0x00000101 0x00001919>;
-
- phy-mode = "sgmii";
- phy-handle = <&phy0>;
-};
-
-&wmac {
- status = "okay";
-
- qca,no-eeprom;
};
diff --git a/target/linux/ath79/dts/qca9563_dlink_dir-8x9-a1.dtsi b/target/linux/ath79/dts/qca9563_dlink_dir-8x9-a1.dtsi
new file mode 100644
index 0000000000..65948ecb22
--- /dev/null
+++ b/target/linux/ath79/dts/qca9563_dlink_dir-8x9-a1.dtsi
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca956x.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+
+ keys {
+ compatible = "gpio-keys";
+
+ wps {
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+};
+
+&pcie {
+ status = "okay";
+};
+
+&spi {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bootloader";
+ reg = <0x000000 0x40000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "bdcfg";
+ reg = <0x040000 0x10000>;
+ read-only;
+ };
+
+ partition@50000 {
+ label = "devdata";
+ reg = <0x050000 0x10000>;
+ read-only;
+ };
+
+ partition@60000 {
+ label = "devconf";
+ reg = <0x060000 0x10000>;
+ read-only;
+ };
+
+ partition@70000 {
+ compatible = "seama";
+ label = "firmware";
+ reg = <0x070000 0xf80000>;
+ };
+
+ art: partition@ff0000 {
+ label = "art";
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ phy-mode = "sgmii";
+ qca,mib-poll-interval = <500>;
+
+ reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+
+ qca,ar8327-initvals = <
+ 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
+ 0x10 0x81000080 /* POWER_ON_STRAP */
+ 0x50 0xcc35cc35 /* LED_CTRL0 */
+ 0x54 0xcb37cb37 /* LED_CTRL1 */
+ 0x58 0x00000000 /* LED_CTRL2 */
+ 0x5c 0x00f3cf00 /* LED_CTRL3 */
+ 0x7c 0x0000007e /* PORT0_STATUS */
+ >;
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ pll-data = <0x03000101 0x00000101 0x00001919>;
+
+ phy-mode = "sgmii";
+ phy-handle = <&phy0>;
+};
+
+&wmac {
+ status = "okay";
+
+ qca,no-eeprom;
+};