diff options
author | Rafał Miłecki <rafal@milecki.pl> | 2023-03-16 20:28:47 +0100 |
---|---|---|
committer | Rafał Miłecki <rafal@milecki.pl> | 2023-03-27 09:03:24 +0200 |
commit | 836e3d1e5ed08b0a66cf55acf62d6625d4db7806 (patch) | |
tree | 0f053f5937324f64148d9d14af02e6e6e1b67615 /target/linux | |
parent | b7c031d93388b77cc8ed8345b247359b68c9283f (diff) | |
download | upstream-836e3d1e5ed08b0a66cf55acf62d6625d4db7806.tar.gz upstream-836e3d1e5ed08b0a66cf55acf62d6625d4db7806.tar.bz2 upstream-836e3d1e5ed08b0a66cf55acf62d6625d4db7806.zip |
bcm4908: backport v6.4 pending DTS changes
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit ffaabee9b8d9da7c15a50f52897ae5f70b40b4e7)
Diffstat (limited to 'target/linux')
9 files changed, 791 insertions, 1 deletions
diff --git a/target/linux/bcm4908/patches-5.10/039-v6.2-0003-arm64-dts-Update-cache-properties-for-broadcom.patch b/target/linux/bcm4908/patches-5.10/039-v6.2-0003-arm64-dts-Update-cache-properties-for-broadcom.patch new file mode 100644 index 0000000000..a19ab8cf8f --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/039-v6.2-0003-arm64-dts-Update-cache-properties-for-broadcom.patch @@ -0,0 +1,134 @@ +From e567e58d6819adc002c57b81e16b88da24d3b4aa Mon Sep 17 00:00:00 2001 +From: Pierre Gondois <pierre.gondois@arm.com> +Date: Tue, 22 Nov 2022 17:32:07 +0100 +Subject: [PATCH] arm64: dts: Update cache properties for broadcom + +The DeviceTree Specification v0.3 specifies that the cache node +'compatible' and 'cache-level' properties are 'required'. Cf. +s3.8 Multi-level and Shared Cache Nodes +The 'cache-unified' property should be present if one of the +properties for unified cache is present ('cache-size', ...). + +Update the Device Trees accordingly. + +Acked-by: William Zhang <william.zhang@broadcom.com> +Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> +Link: https://lore.kernel.org/r/20221122163208.3810985-3-pierre.gondois@arm.com +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 + + arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 + + arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 + + arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 + + arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 + + arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 + + arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 + + arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 + + arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++ + 9 files changed, 12 insertions(+) + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +@@ -63,6 +63,7 @@ + + l2: l2-cache0 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi +@@ -51,6 +51,7 @@ + + L2_0: l2-cache0 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi +@@ -35,6 +35,7 @@ + + L2_0: l2-cache0 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi +@@ -51,6 +51,7 @@ + + L2_0: l2-cache0 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi +@@ -51,6 +51,7 @@ + + L2_0: l2-cache0 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi +@@ -35,6 +35,7 @@ + + L2_0: l2-cache0 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi +@@ -50,6 +50,7 @@ + }; + L2_0: l2-cache0 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + +--- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi ++++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +@@ -79,6 +79,7 @@ + + CLUSTER0_L2: l2-cache@0 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + +--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi ++++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +@@ -108,18 +108,22 @@ + + CLUSTER0_L2: l2-cache@0 { + compatible = "cache"; ++ cache-level = <2>; + }; + + CLUSTER1_L2: l2-cache@100 { + compatible = "cache"; ++ cache-level = <2>; + }; + + CLUSTER2_L2: l2-cache@200 { + compatible = "cache"; ++ cache-level = <2>; + }; + + CLUSTER3_L2: l2-cache@300 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0001-arm64-dts-broadcom-bcmbca-Add-spi-controller-node.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0001-arm64-dts-broadcom-bcmbca-Add-spi-controller-node.patch new file mode 100644 index 0000000000..e8e1228179 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/040-v6.4-0001-arm64-dts-broadcom-bcmbca-Add-spi-controller-node.patch @@ -0,0 +1,367 @@ +From f5d83b714e304d5f3229da434af2eeea033c4f5d Mon Sep 17 00:00:00 2001 +From: William Zhang <william.zhang@broadcom.com> +Date: Mon, 6 Feb 2023 22:58:15 -0800 +Subject: [PATCH] arm64: dts: broadcom: bcmbca: Add spi controller node + +Add support for HSSPI controller in ARMv8 chip dts files. + +Signed-off-by: William Zhang <william.zhang@broadcom.com> +Link: https://lore.kernel.org/r/20230207065826.285013-5-william.zhang@broadcom.com +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + .../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 18 +++++++++++++++++ + .../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 20 +++++++++++++++++++ + .../boot/dts/broadcom/bcmbca/bcm63146.dtsi | 19 ++++++++++++++++++ + .../boot/dts/broadcom/bcmbca/bcm63158.dtsi | 19 ++++++++++++++++++ + .../boot/dts/broadcom/bcmbca/bcm6813.dtsi | 20 +++++++++++++++++++ + .../boot/dts/broadcom/bcmbca/bcm6856.dtsi | 18 +++++++++++++++++ + .../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 18 +++++++++++++++++ + .../boot/dts/broadcom/bcmbca/bcm94908.dts | 4 ++++ + .../boot/dts/broadcom/bcmbca/bcm94912.dts | 4 ++++ + .../boot/dts/broadcom/bcmbca/bcm963146.dts | 4 ++++ + .../boot/dts/broadcom/bcmbca/bcm963158.dts | 4 ++++ + .../boot/dts/broadcom/bcmbca/bcm96813.dts | 4 ++++ + .../boot/dts/broadcom/bcmbca/bcm96856.dts | 4 ++++ + .../boot/dts/broadcom/bcmbca/bcm96858.dts | 4 ++++ + 14 files changed, 160 insertions(+) + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +@@ -107,6 +107,12 @@ + clock-frequency = <50000000>; + clock-output-names = "periph"; + }; ++ ++ hsspi_pll: hsspi-pll { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <400000000>; ++ }; + }; + + soc { +@@ -531,6 +537,18 @@ + #size-cells = <0>; + }; + ++ hsspi: spi@1000{ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0"; ++ reg = <0x1000 0x600>; ++ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&hsspi_pll &hsspi_pll>; ++ clock-names = "hsspi", "pll"; ++ num-cs = <8>; ++ status = "disabled"; ++ }; ++ + nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi +@@ -79,6 +79,7 @@ + #clock-cells = <0>; + clock-frequency = <200000000>; + }; ++ + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; +@@ -86,6 +87,12 @@ + clock-div = <4>; + clock-mult = <1>; + }; ++ ++ hsspi_pll: hsspi-pll { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <200000000>; ++ }; + }; + + psci { +@@ -117,6 +124,19 @@ + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + ++ hsspi: spi@1000 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1"; ++ reg = <0x1000 0x600>, <0x2610 0x4>; ++ reg-names = "hsspi", "spim-ctrl"; ++ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&hsspi_pll &hsspi_pll>; ++ clock-names = "hsspi", "pll"; ++ num-cs = <8>; ++ status = "disabled"; ++ }; ++ + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi +@@ -60,6 +60,7 @@ + #clock-cells = <0>; + clock-frequency = <200000000>; + }; ++ + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; +@@ -67,6 +68,12 @@ + clock-div = <4>; + clock-mult = <1>; + }; ++ ++ hsspi_pll: hsspi-pll { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <200000000>; ++ }; + }; + + psci { +@@ -99,6 +106,18 @@ + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + ++ hsspi: spi@1000 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "brcm,bcm63146-hsspi", "brcm,bcmbca-hsspi-v1.0"; ++ reg = <0x1000 0x600>; ++ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&hsspi_pll &hsspi_pll>; ++ clock-names = "hsspi", "pll"; ++ num-cs = <8>; ++ status = "disabled"; ++ }; ++ + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi +@@ -79,6 +79,7 @@ + #clock-cells = <0>; + clock-frequency = <200000000>; + }; ++ + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; +@@ -86,6 +87,12 @@ + clock-div = <4>; + clock-mult = <1>; + }; ++ ++ hsspi_pll: hsspi-pll { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <400000000>; ++ }; + }; + + psci { +@@ -117,6 +124,18 @@ + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + ++ hsspi: spi@1000 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0"; ++ reg = <0x1000 0x600>; ++ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&hsspi_pll &hsspi_pll>; ++ clock-names = "hsspi", "pll"; ++ num-cs = <8>; ++ status = "disabled"; ++ }; ++ + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi +@@ -79,6 +79,7 @@ + #clock-cells = <0>; + clock-frequency = <200000000>; + }; ++ + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; +@@ -86,6 +87,12 @@ + clock-div = <4>; + clock-mult = <1>; + }; ++ ++ hsspi_pll: hsspi-pll { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <200000000>; ++ }; + }; + + psci { +@@ -117,6 +124,19 @@ + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + ++ hsspi: spi@1000 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "brcm,bcm6813-hsspi", "brcm,bcmbca-hsspi-v1.1"; ++ reg = <0x1000 0x600>, <0x2610 0x4>; ++ reg-names = "hsspi", "spim-ctrl"; ++ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&hsspi_pll &hsspi_pll>; ++ clock-names = "hsspi", "pll"; ++ num-cs = <8>; ++ status = "disabled"; ++ }; ++ + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi +@@ -60,6 +60,12 @@ + #clock-cells = <0>; + clock-frequency = <200000000>; + }; ++ ++ hsspi_pll: hsspi-pll { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <400000000>; ++ }; + }; + + psci { +@@ -100,5 +106,17 @@ + clock-names = "refclk"; + status = "disabled"; + }; ++ ++ hsspi: spi@1000 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0"; ++ reg = <0x1000 0x600>; ++ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&hsspi_pll &hsspi_pll>; ++ clock-names = "hsspi", "pll"; ++ num-cs = <8>; ++ status = "disabled"; ++ }; + }; + }; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi +@@ -78,6 +78,12 @@ + #clock-cells = <0>; + clock-frequency = <200000000>; + }; ++ ++ hsspi_pll: hsspi-pll { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <400000000>; ++ }; + }; + + psci { +@@ -137,5 +143,17 @@ + clock-names = "refclk"; + status = "disabled"; + }; ++ ++ hsspi: spi@1000 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0"; ++ reg = <0x1000 0x600>; ++ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&hsspi_pll &hsspi_pll>; ++ clock-names = "hsspi", "pll"; ++ num-cs = <8>; ++ status = "disabled"; ++ }; + }; + }; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts +@@ -28,3 +28,7 @@ + &uart0 { + status = "okay"; + }; ++ ++&hsspi { ++ status = "okay"; ++}; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts +@@ -28,3 +28,7 @@ + &uart0 { + status = "okay"; + }; ++ ++&hsspi { ++ status = "okay"; ++}; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts +@@ -28,3 +28,7 @@ + &uart0 { + status = "okay"; + }; ++ ++&hsspi { ++ status = "okay"; ++}; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts +@@ -28,3 +28,7 @@ + &uart0 { + status = "okay"; + }; ++ ++&hsspi { ++ status = "okay"; ++}; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts +@@ -28,3 +28,7 @@ + &uart0 { + status = "okay"; + }; ++ ++&hsspi { ++ status = "okay"; ++}; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts +@@ -28,3 +28,7 @@ + &uart0 { + status = "okay"; + }; ++ ++&hsspi { ++ status = "okay"; ++}; +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts +@@ -28,3 +28,7 @@ + &uart0 { + status = "okay"; + }; ++ ++&hsspi { ++ status = "okay"; ++}; diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0002-arm64-dts-broadcom-bcmbca-bcm4908-fix-NAND-interrupt.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0002-arm64-dts-broadcom-bcmbca-bcm4908-fix-NAND-interrupt.patch new file mode 100644 index 0000000000..b121200a25 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/040-v6.4-0002-arm64-dts-broadcom-bcmbca-bcm4908-fix-NAND-interrupt.patch @@ -0,0 +1,33 @@ +From 5cca02449490e767289bda38db1577e2c375c084 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Tue, 28 Feb 2023 15:43:58 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: fix NAND interrupt + name +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This fixes: +arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: nand-controller@1800: interrupt-names:0: 'nand_ctlrdy' was expected + From schema: Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: nand-controller@1800: Unevaluated properties are not allowed ('interrupt-names' was unexpected) + From schema: Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Link: https://lore.kernel.org/all/20230228144400.21689-1-zajec5@gmail.com/ +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +@@ -556,7 +556,7 @@ + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; +- interrupt-names = "nand"; ++ interrupt-names = "nand_ctlrdy"; + status = "okay"; + + nandcs: nand@0 { diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0003-arm64-dts-broadcom-bcmbca-bcm4908-fix-LED-nodenames.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0003-arm64-dts-broadcom-bcmbca-bcm4908-fix-LED-nodenames.patch new file mode 100644 index 0000000000..7ce17c1870 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/040-v6.4-0003-arm64-dts-broadcom-bcmbca-bcm4908-fix-LED-nodenames.patch @@ -0,0 +1,66 @@ +From 23be9f68f933adee8163b8efc9c6bff71410cc7c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Tue, 28 Feb 2023 15:43:59 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: fix LED nodenames +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This fixes: +arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dtb: leds@800: 'led-lan@19', 'led-power@11', 'led-wan-red@12', 'led-wan-white@15', 'led-wps@14' do not match any of the regexes: '^led@[a-f0-9]+$', 'pinctrl-[0-9]+' + From schema: Documentation/devicetree/bindings/leds/leds-bcm63138.yaml + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Link: https://lore.kernel.org/all/20230228144400.21689-2-zajec5@gmail.com/ +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + .../dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts +@@ -120,7 +120,7 @@ + }; + + &leds { +- led-power@11 { ++ led@11 { + reg = <0x11>; + function = LED_FUNCTION_POWER; + color = <LED_COLOR_ID_WHITE>; +@@ -130,7 +130,7 @@ + pinctrl-0 = <&pins_led_17_a>; + }; + +- led-wan-red@12 { ++ led@12 { + reg = <0x12>; + function = LED_FUNCTION_WAN; + color = <LED_COLOR_ID_RED>; +@@ -139,7 +139,7 @@ + pinctrl-0 = <&pins_led_18_a>; + }; + +- led-wps@14 { ++ led@14 { + reg = <0x14>; + function = LED_FUNCTION_WPS; + color = <LED_COLOR_ID_WHITE>; +@@ -148,7 +148,7 @@ + pinctrl-0 = <&pins_led_20_a>; + }; + +- led-wan-white@15 { ++ led@15 { + reg = <0x15>; + function = LED_FUNCTION_WAN; + color = <LED_COLOR_ID_WHITE>; +@@ -157,7 +157,7 @@ + pinctrl-0 = <&pins_led_21_a>; + }; + +- led-lan@19 { ++ led@19 { + reg = <0x19>; + function = LED_FUNCTION_LAN; + color = <LED_COLOR_ID_WHITE>; diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0004-arm64-dts-broadcom-bcmbca-bcm4908-fix-procmon-nodena.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0004-arm64-dts-broadcom-bcmbca-bcm4908-fix-procmon-nodena.patch new file mode 100644 index 0000000000..a469a32a2c --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/040-v6.4-0004-arm64-dts-broadcom-bcmbca-bcm4908-fix-procmon-nodena.patch @@ -0,0 +1,30 @@ +From f16a8294dd7a02c7ad042cd2e3acc5ea06698dc1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Tue, 28 Feb 2023 15:44:00 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: fix procmon nodename +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This fixes: +arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: syscon@280000: $nodename:0: 'syscon@280000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$' + From schema: schemas/simple-bus.yaml + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Link: https://lore.kernel.org/all/20230228144400.21689-3-zajec5@gmail.com/ +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +@@ -260,7 +260,7 @@ + }; + }; + +- procmon: syscon@280000 { ++ procmon: bus@280000 { + compatible = "simple-bus"; + reg = <0x280000 0x1000>; + ranges; diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0005-arm64-dts-broadcom-bcmbca-bcm4908-add-on-SoC-USB-por.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0005-arm64-dts-broadcom-bcmbca-bcm4908-add-on-SoC-USB-por.patch new file mode 100644 index 0000000000..47b2455ae6 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/040-v6.4-0005-arm64-dts-broadcom-bcmbca-bcm4908-add-on-SoC-USB-por.patch @@ -0,0 +1,81 @@ +From 477cad715de1dfc256a20da3ed83b62f3cb2944d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Tue, 28 Feb 2023 15:45:18 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add on-SoC USB ports +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 has 3 USB controllers each with 2 USB ports. Home routers often +have LEDs indicating state of selected USB ports. Describe those SoC USB +ports to allow using them as LED trigger sources. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Link: https://lore.kernel.org/all/20230228144520.21816-1-zajec5@gmail.com/ +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + .../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 39 +++++++++++++++++++ + 1 file changed, 39 insertions(+) + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +@@ -148,6 +148,19 @@ + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb_phy PHY_TYPE_USB2>; + status = "disabled"; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ehci_port1: port@1 { ++ reg = <1>; ++ #trigger-source-cells = <0>; ++ }; ++ ++ ehci_port2: port@2 { ++ reg = <2>; ++ #trigger-source-cells = <0>; ++ }; + }; + + ohci: usb@c400 { +@@ -156,6 +169,19 @@ + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb_phy PHY_TYPE_USB2>; + status = "disabled"; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ohci_port1: port@1 { ++ reg = <1>; ++ #trigger-source-cells = <0>; ++ }; ++ ++ ohci_port2: port@2 { ++ reg = <2>; ++ #trigger-source-cells = <0>; ++ }; + }; + + xhci: usb@d000 { +@@ -164,6 +190,19 @@ + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb_phy PHY_TYPE_USB3>; + status = "disabled"; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ xhci_port1: port@1 { ++ reg = <1>; ++ #trigger-source-cells = <0>; ++ }; ++ ++ xhci_port2: port@2 { ++ reg = <2>; ++ #trigger-source-cells = <0>; ++ }; + }; + + bus@80000 { diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0006-arm64-dts-broadcom-bcmbca-bcm4908-add-Netgear-R8000P.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0006-arm64-dts-broadcom-bcmbca-bcm4908-add-Netgear-R8000P.patch new file mode 100644 index 0000000000..3e210d68e1 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/040-v6.4-0006-arm64-dts-broadcom-bcmbca-bcm4908-add-Netgear-R8000P.patch @@ -0,0 +1,38 @@ +From 889e53ccccc29ff4bf8d4c89cca34e8768845747 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Tue, 28 Feb 2023 15:45:19 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add Netgear R8000P USB + LED triggers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This device has 2 USB LEDs meant to be triggered by devices in relevant +USB ports. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Link: https://lore.kernel.org/all/20230228144520.21816-2-zajec5@gmail.com/ +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + .../arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts +@@ -58,12 +58,16 @@ + function = "usb2"; + color = <LED_COLOR_ID_WHITE>; + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; ++ trigger-sources = <&ohci_port1>, <&ehci_port1>; ++ linux,default-trigger = "usbport"; + }; + + led-usb3 { + function = "usb3"; + color = <LED_COLOR_ID_WHITE>; + gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; ++ trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>; ++ linux,default-trigger = "usbport"; + }; + + led-wifi { diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0007-arm64-dts-broadcom-bcmbca-bcm4908-add-TP-Link-C2300-.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0007-arm64-dts-broadcom-bcmbca-bcm4908-add-TP-Link-C2300-.patch new file mode 100644 index 0000000000..959ccd4fa3 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/040-v6.4-0007-arm64-dts-broadcom-bcmbca-bcm4908-add-TP-Link-C2300-.patch @@ -0,0 +1,41 @@ +From e6d356b146b75f1f77621aab7950a1eb550859f9 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Tue, 28 Feb 2023 15:45:20 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add TP-Link C2300 USB + LED triggers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This device has 2 USB LEDs meant to be triggered by devices in relevant +USB ports. + +While at it fix typo in USB LED name. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Link: https://lore.kernel.org/all/20230228144520.21816-3-zajec5@gmail.com/ +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + .../dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts ++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts +@@ -64,12 +64,16 @@ + function = "usb2"; + color = <LED_COLOR_ID_BLUE>; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; ++ trigger-sources = <&ohci_port1>, <&ehci_port1>; ++ linux,default-trigger = "usbport"; + }; + + led-usb3 { +- function = "usbd3"; ++ function = "usb3"; + color = <LED_COLOR_ID_BLUE>; + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; ++ trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>; ++ linux,default-trigger = "usbport"; + }; + + led-brightness { diff --git a/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcmbca-bcm4908-limit-amount-of-GP.patch b/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcmbca-bcm4908-limit-amount-of-GP.patch index bc0743c800..a7c6d0102f 100644 --- a/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcmbca-bcm4908-limit-amount-of-GP.patch +++ b/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcmbca-bcm4908-limit-amount-of-GP.patch @@ -12,7 +12,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -@@ -297,7 +297,7 @@ +@@ -343,7 +343,7 @@ gpio0: gpio-controller@500 { compatible = "brcm,bcm6345-gpio"; reg-names = "dirout", "dat"; |