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authorBirger Koblitz <git@birger-koblitz.de>2021-09-08 20:16:39 +0200
committerJohn Crispin <john@phrozen.org>2021-10-09 08:25:06 +0200
commit9ae927febd4b07e064bdb9eaeb43862ea6c7ac8f (patch)
tree0525d4125cbbd93eade355321a17e8531f2ee86d /target/linux
parent28e972b2ea2f55a593defcbd2dc21710cce648c7 (diff)
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realtek: Fix bug in VLAN ingress and egress filtering
The ingress filter registers use 2 bits for each port to define the filtering state, whereas the egress filter uses 1 bit. So for for the ingress filter the register offset for a given port is: (port >> 4) << 4: since there are 16 entries in a register of 32 bits and for the egress filter: (port >> 5) << 4: since there are 32 entries in a register of 32 bits Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c
index 8ed0e45bb9..8ad713163e 100644
--- a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c
+++ b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c
@@ -1071,14 +1071,14 @@ static int rtl83xx_vlan_filtering(struct dsa_switch *ds, int port,
*/
if (port != priv->cpu_port)
sw_w32_mask(0b10 << ((port % 16) << 1), 0b01 << ((port % 16) << 1),
- priv->r->vlan_port_igr_filter + ((port >> 5) << 2));
- sw_w32_mask(0, BIT(port % 32), priv->r->vlan_port_egr_filter + ((port >> 4) << 2));
+ priv->r->vlan_port_igr_filter + ((port >> 4) << 2));
+ sw_w32_mask(0, BIT(port % 32), priv->r->vlan_port_egr_filter + ((port >> 5) << 2));
} else {
/* Disable ingress and egress filtering */
if (port != priv->cpu_port)
sw_w32_mask(0b11 << ((port % 16) << 1), 0,
- priv->r->vlan_port_igr_filter + ((port >> 5) << 2));
- sw_w32_mask(BIT(port % 32), 0, priv->r->vlan_port_egr_filter + ((port >> 4) << 2));
+ priv->r->vlan_port_igr_filter + ((port >> 4) << 2));
+ sw_w32_mask(BIT(port % 32), 0, priv->r->vlan_port_egr_filter + ((port >> 5) << 2));
}
/* Do we need to do something to the CPU-Port, too? */