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| author | Felix Fietkau <nbd@nbd.name> | 2016-05-15 13:14:00 +0200 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2016-05-15 20:55:39 +0200 |
| commit | 313474e6931805349a8224b6442c68ee162da458 (patch) | |
| tree | 96f8af7c302a42f00fd5a905981060cd3722acfc /target/linux | |
| parent | 5b34dffcbd6175d92f871b69098e027341b6c82e (diff) | |
| download | upstream-313474e6931805349a8224b6442c68ee162da458.tar.gz upstream-313474e6931805349a8224b6442c68ee162da458.tar.bz2 upstream-313474e6931805349a8224b6442c68ee162da458.zip | |
ar71xx: fix a PCI initialization issue in Linux 4.4
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/ar71xx/patches-4.4/102-MIPS-ath79-fix-regression-in-PCI-window-initializati.patch | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.4/102-MIPS-ath79-fix-regression-in-PCI-window-initializati.patch b/target/linux/ar71xx/patches-4.4/102-MIPS-ath79-fix-regression-in-PCI-window-initializati.patch new file mode 100644 index 0000000000..96cc8ae541 --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/102-MIPS-ath79-fix-regression-in-PCI-window-initializati.patch @@ -0,0 +1,37 @@ +From: Felix Fietkau <nbd@nbd.name> +Date: Sun, 15 May 2016 13:09:20 +0200 +Subject: [PATCH] MIPS: ath79: fix regression in PCI window initialization + +ath79_ddr_pci_win_base has the type void __iomem *, so register offsets +need to be a multiple of 4. + +Cc: Alban Bedel <albeu@free.fr> +Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface") +Signed-off-by: Felix Fietkau <nbd@nbd.name> +--- + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -76,14 +76,14 @@ void ath79_ddr_set_pci_windows(void) + { + BUG_ON(!ath79_ddr_pci_win_base); + +- __raw_writel(AR71XX_PCI_WIN0_OFFS, ath79_ddr_pci_win_base + 0); +- __raw_writel(AR71XX_PCI_WIN1_OFFS, ath79_ddr_pci_win_base + 1); +- __raw_writel(AR71XX_PCI_WIN2_OFFS, ath79_ddr_pci_win_base + 2); +- __raw_writel(AR71XX_PCI_WIN3_OFFS, ath79_ddr_pci_win_base + 3); +- __raw_writel(AR71XX_PCI_WIN4_OFFS, ath79_ddr_pci_win_base + 4); +- __raw_writel(AR71XX_PCI_WIN5_OFFS, ath79_ddr_pci_win_base + 5); +- __raw_writel(AR71XX_PCI_WIN6_OFFS, ath79_ddr_pci_win_base + 6); +- __raw_writel(AR71XX_PCI_WIN7_OFFS, ath79_ddr_pci_win_base + 7); ++ __raw_writel(AR71XX_PCI_WIN0_OFFS, ath79_ddr_pci_win_base + 0x0); ++ __raw_writel(AR71XX_PCI_WIN1_OFFS, ath79_ddr_pci_win_base + 0x4); ++ __raw_writel(AR71XX_PCI_WIN2_OFFS, ath79_ddr_pci_win_base + 0x8); ++ __raw_writel(AR71XX_PCI_WIN3_OFFS, ath79_ddr_pci_win_base + 0xc); ++ __raw_writel(AR71XX_PCI_WIN4_OFFS, ath79_ddr_pci_win_base + 0x10); ++ __raw_writel(AR71XX_PCI_WIN5_OFFS, ath79_ddr_pci_win_base + 0x14); ++ __raw_writel(AR71XX_PCI_WIN6_OFFS, ath79_ddr_pci_win_base + 0x18); ++ __raw_writel(AR71XX_PCI_WIN7_OFFS, ath79_ddr_pci_win_base + 0x20); + } + EXPORT_SYMBOL_GPL(ath79_ddr_set_pci_windows); + |